From patchwork Fri Jun 5 08:44:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tiejun Chen X-Patchwork-Id: 481112 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 2A39514016A for ; Fri, 5 Jun 2015 18:49:14 +1000 (AEST) Received: from localhost ([::1]:45918 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0nJQ-0006Wr-3g for incoming@patchwork.ozlabs.org; Fri, 05 Jun 2015 04:49:12 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58144) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0nIo-0005Ue-0n for qemu-devel@nongnu.org; Fri, 05 Jun 2015 04:48:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z0nIm-0005U3-Nl for qemu-devel@nongnu.org; Fri, 05 Jun 2015 04:48:33 -0400 Received: from mga11.intel.com ([192.55.52.93]:24454) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0nIm-0005Sq-F6 for qemu-devel@nongnu.org; Fri, 05 Jun 2015 04:48:32 -0400 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP; 05 Jun 2015 01:48:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,557,1427785200"; d="scan'208";a="582578359" Received: from tchen0-linux.bj.intel.com ([10.238.154.91]) by orsmga003.jf.intel.com with ESMTP; 05 Jun 2015 01:48:30 -0700 From: Tiejun Chen To: mst@redhat.com, pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com Date: Fri, 5 Jun 2015 16:44:54 +0800 Message-Id: <1433493901-9332-4-git-send-email-tiejun.chen@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1433493901-9332-1-git-send-email-tiejun.chen@intel.com> References: <1433493901-9332-1-git-send-email-tiejun.chen@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.93 Cc: qemu-devel@nongnu.org Subject: [Qemu-devel] [v8][RESEND][PATCH 03/10] piix: create host bridge to passthrough X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Implement a pci host bridge specific to passthrough. Actually this just inherits the standard one. And we also just expose a minimal real host bridge pci configuration subset. Signed-off-by: Tiejun Chen --- hw/pci-host/piix.c | 82 ++++++++++++++++++++++++++++++++++++++++++++++++++++ include/hw/i386/pc.h | 2 ++ 2 files changed, 84 insertions(+) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index c812eaa..0906ba5 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -728,6 +728,87 @@ static const TypeInfo i440fx_info = { .class_init = i440fx_class_init, }; +/* IGD Passthrough Host Bridge. */ +typedef struct { + uint8_t offset; + uint8_t len; +} IGDHostInfo; + +/* Here we just expose minimal host bridge offset subset. */ +static const IGDHostInfo igd_host_bridge_infos[] = { + {0x08, 2}, /* revision id */ + {0x2c, 2}, /* sybsystem vendor id */ + {0x2e, 2}, /* sybsystem id */ + {0x50, 2}, /* SNB: processor graphics control register */ + {0x52, 2}, /* processor graphics control register */ + {0xa4, 4}, /* SNB: graphics base of stolen memory */ + {0xa8, 4}, /* SNB: base of GTT stolen memory */ +}; + +static int host_pci_config_read(int pos, int len, uint32_t val) +{ + char path[PATH_MAX]; + int config_fd; + ssize_t size = sizeof(path); + /* Access real host bridge. */ + int rc = snprintf(path, size, "/sys/bus/pci/devices/%04x:%02x:%02x.%d/%s", + 0, 0, 0, 0, "config"); + + if (rc >= size || rc < 0) { + return -ENODEV; + } + + config_fd = open(path, O_RDWR); + if (config_fd < 0) { + return -ENODEV; + } + + do { + rc = pread(config_fd, (uint8_t *)&val, len, pos); + } while (rc < 0 && (errno == EINTR || errno == EAGAIN)); + if (rc != len) { + return -errno; + } + + return 0; +} + +static int igd_pt_i440fx_initfn(struct PCIDevice *pci_dev) +{ + uint32_t val = 0; + int rc, i, num; + int pos, len; + + num = ARRAY_SIZE(igd_host_bridge_infos); + for (i = 0; i < num; i++) { + pos = igd_host_bridge_infos[i].offset; + len = igd_host_bridge_infos[i].len; + rc = host_pci_config_read(pos, len, val); + if (rc) { + return -ENODEV; + } + pci_default_write_config(pci_dev, pos, val, len); + } + + return 0; +} + +static void igd_passthrough_i440fx_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->init = igd_pt_i440fx_initfn; + dc->desc = "IGD Passthrough Host bridge"; +} + +static const TypeInfo igd_passthrough_i440fx_info = { + .name = TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE, + .parent = TYPE_I440FX_PCI_DEVICE, + .instance_size = sizeof(PCII440FXState), + .class_init = igd_passthrough_i440fx_class_init, +}; + static const char *i440fx_pcihost_root_bus_path(PCIHostState *host_bridge, PCIBus *rootbus) { @@ -769,6 +850,7 @@ static const TypeInfo i440fx_pcihost_info = { static void i440fx_register_types(void) { type_register_static(&i440fx_info); + type_register_static(&igd_passthrough_i440fx_info); type_register_static(&piix3_info); type_register_static(&piix3_xen_info); type_register_static(&i440fx_pcihost_info); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index bb808c9..83962aa 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -232,6 +232,8 @@ typedef struct PCII440FXState PCII440FXState; #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" #define TYPE_I440FX_PCI_DEVICE "i440FX" +#define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" + PCIBus *i440fx_init(const char *host_type, const char *pci_type, PCII440FXState **pi440fx_state, int *piix_devfn, ISABus **isa_bus, qemu_irq *pic,