From patchwork Fri Apr 24 06:47:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bharata B Rao X-Patchwork-Id: 464131 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4E2BB1400A0 for ; Fri, 24 Apr 2015 16:58:02 +1000 (AEST) Received: from localhost ([::1]:43172 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YlXYm-000154-KC for incoming@patchwork.ozlabs.org; Fri, 24 Apr 2015 02:58:00 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52859) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YlXTD-0006Vl-KB for qemu-devel@nongnu.org; Fri, 24 Apr 2015 02:52:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YlXT9-0004uk-9t for qemu-devel@nongnu.org; Fri, 24 Apr 2015 02:52:15 -0400 Received: from e23smtp04.au.ibm.com ([202.81.31.146]:57585) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YlXT8-0004tN-55 for qemu-devel@nongnu.org; Fri, 24 Apr 2015 02:52:11 -0400 Received: from /spool/local by e23smtp04.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Fri, 24 Apr 2015 16:52:06 +1000 Received: from d23relay09.au.ibm.com (d23relay09.au.ibm.com [9.185.63.181]) by d23dlp03.au.ibm.com (Postfix) with ESMTP id 226883578047; Fri, 24 Apr 2015 16:52:06 +1000 (EST) Received: from d23av02.au.ibm.com (d23av02.au.ibm.com [9.190.235.138]) by d23relay09.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t3O6pwWL39387314; Fri, 24 Apr 2015 16:52:06 +1000 Received: from d23av02.au.ibm.com (localhost [127.0.0.1]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t3O6pWSw029748; Fri, 24 Apr 2015 16:51:32 +1000 Received: from bharata.in.ibm.com ([9.79.216.71]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t3O6m5Qp023890; Fri, 24 Apr 2015 16:51:20 +1000 From: Bharata B Rao To: qemu-devel@nongnu.org Date: Fri, 24 Apr 2015 12:17:35 +0530 Message-Id: <1429858066-12088-14-git-send-email-bharata@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1429858066-12088-1-git-send-email-bharata@linux.vnet.ibm.com> References: <1429858066-12088-1-git-send-email-bharata@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15042406-0013-0000-0000-00000129D866 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 202.81.31.146 Cc: aik@ozlabs.ru, Bharata B Rao , mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, tyreld@linux.vnet.ibm.com, nfont@linux.vnet.ibm.com, imammedo@redhat.com, afaerber@suse.de, david@gibson.dropbear.id.au Subject: [Qemu-devel] [RFC PATCH v3 13/24] cpus: Add Error argument to cpu_exec_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add an Error argument to cpu_exec_init() to let users collect the error. Change all callers to currently pass NULL error argument. This change is needed for the following reasons: - A subsequent commit changes the CPU enumeration logic in cpu_exec_init() resulting in cpu_exec_init() to fail if cpu_index values corresponding to max_cpus have already been handed out. - There is a thinking that cpu_exec_init() should be called from realize rather than instance_init. With this change, those architectures that can move this call into realize function can do so in a phased manner. Signed-off-by: Bharata B Rao Reviewed-by: David Gibson --- exec.c | 2 +- include/exec/exec-all.h | 2 +- target-alpha/cpu.c | 2 +- target-arm/cpu.c | 2 +- target-cris/cpu.c | 2 +- target-i386/cpu.c | 2 +- target-lm32/cpu.c | 2 +- target-m68k/cpu.c | 2 +- target-microblaze/cpu.c | 2 +- target-mips/cpu.c | 2 +- target-moxie/cpu.c | 2 +- target-openrisc/cpu.c | 2 +- target-ppc/translate_init.c | 2 +- target-s390x/cpu.c | 2 +- target-sh4/cpu.c | 2 +- target-sparc/cpu.c | 2 +- target-tricore/cpu.c | 2 +- target-unicore32/cpu.c | 2 +- target-xtensa/cpu.c | 2 +- 19 files changed, 19 insertions(+), 19 deletions(-) diff --git a/exec.c b/exec.c index c85321a..e1ff6b0 100644 --- a/exec.c +++ b/exec.c @@ -527,7 +527,7 @@ void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as) } #endif -void cpu_exec_init(CPUArchState *env) +void cpu_exec_init(CPUArchState *env, Error **errp) { CPUState *cpu = ENV_GET_CPU(env); CPUClass *cc = CPU_GET_CLASS(cpu); diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 8eb0db3..41a9393 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -88,7 +88,7 @@ void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc, target_ulong cs_base, int flags, int cflags); -void cpu_exec_init(CPUArchState *env); +void cpu_exec_init(CPUArchState *env, Error **errp); void QEMU_NORETURN cpu_loop_exit(CPUState *cpu); int page_unprotect(target_ulong address, uintptr_t pc, void *puc); void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index a98b7d8..0a0c21e 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -257,7 +257,7 @@ static void alpha_cpu_initfn(Object *obj) CPUAlphaState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); tlb_flush(cs, 1); alpha_translate_init(); diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 986f04c..86edaab 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -369,7 +369,7 @@ static void arm_cpu_initfn(Object *obj) static bool inited; cs->env_ptr = &cpu->env; - cpu_exec_init(&cpu->env); + cpu_exec_init(&cpu->env, NULL); cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal, g_free, g_free); diff --git a/target-cris/cpu.c b/target-cris/cpu.c index 16cfba9..8b589ec 100644 --- a/target-cris/cpu.c +++ b/target-cris/cpu.c @@ -170,7 +170,7 @@ static void cris_cpu_initfn(Object *obj) static bool tcg_initialized; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); env->pregs[PR_VR] = ccc->vr; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index d543e2b..daccf4f 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2886,7 +2886,7 @@ static void x86_cpu_initfn(Object *obj) static int inited; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); object_property_add(obj, "family", "int", x86_cpuid_version_get_family, diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index f8081f5..89b6631 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -151,7 +151,7 @@ static void lm32_cpu_initfn(Object *obj) static bool tcg_initialized; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); env->flags = 0; diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c index 4cfb725..6a41551 100644 --- a/target-m68k/cpu.c +++ b/target-m68k/cpu.c @@ -168,7 +168,7 @@ static void m68k_cpu_initfn(Object *obj) static bool inited; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); if (tcg_enabled() && !inited) { inited = true; diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index 67e3182..6b3732d 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -130,7 +130,7 @@ static void mb_cpu_initfn(Object *obj) static bool tcg_initialized; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); set_float_rounding_mode(float_round_nearest_even, &env->fp_status); diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 98dc94e..02f1d32 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -115,7 +115,7 @@ static void mips_cpu_initfn(Object *obj) CPUMIPSState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); if (tcg_enabled()) { mips_tcg_init(); diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c index 47b617f..f815fb3 100644 --- a/target-moxie/cpu.c +++ b/target-moxie/cpu.c @@ -66,7 +66,7 @@ static void moxie_cpu_initfn(Object *obj) static int inited; cs->env_ptr = &cpu->env; - cpu_exec_init(&cpu->env); + cpu_exec_init(&cpu->env, NULL); if (tcg_enabled() && !inited) { inited = 1; diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index 39bedc1..87b2f80 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -92,7 +92,7 @@ static void openrisc_cpu_initfn(Object *obj) static int inited; cs->env_ptr = &cpu->env; - cpu_exec_init(&cpu->env); + cpu_exec_init(&cpu->env, NULL); #ifndef CONFIG_USER_ONLY cpu_openrisc_mmu_init(cpu); diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index a8716cf..9f4f172 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -9679,7 +9679,7 @@ static void ppc_cpu_initfn(Object *obj) CPUPPCState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); cpu->cpu_dt_id = cs->cpu_index; env->msr_mask = pcc->msr_mask; diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c index d2f6312..28717bd 100644 --- a/target-s390x/cpu.c +++ b/target-s390x/cpu.c @@ -185,7 +185,7 @@ static void s390_cpu_initfn(Object *obj) #endif cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); #if !defined(CONFIG_USER_ONLY) qemu_register_reset(s390_cpu_machine_reset_cb, cpu); qemu_get_timedate(&tm, 0); diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c index d187a2b..ffb635e 100644 --- a/target-sh4/cpu.c +++ b/target-sh4/cpu.c @@ -247,7 +247,7 @@ static void superh_cpu_initfn(Object *obj) CPUSH4State *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); env->movcal_backup_tail = &(env->movcal_backup); diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index a952097..d857aae 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -802,7 +802,7 @@ static void sparc_cpu_initfn(Object *obj) CPUSPARCState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); if (tcg_enabled()) { gen_intermediate_code_init(env); diff --git a/target-tricore/cpu.c b/target-tricore/cpu.c index 2ba0cf4..53b117b 100644 --- a/target-tricore/cpu.c +++ b/target-tricore/cpu.c @@ -88,7 +88,7 @@ static void tricore_cpu_initfn(Object *obj) CPUTriCoreState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); if (tcg_enabled()) { tricore_tcg_init(); diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index 5b32987..d56d78a 100644 --- a/target-unicore32/cpu.c +++ b/target-unicore32/cpu.c @@ -111,7 +111,7 @@ static void uc32_cpu_initfn(Object *obj) static bool inited; cs->env_ptr = env; - cpu_exec_init(env); + cpu_exec_init(env, NULL); #ifdef CONFIG_USER_ONLY env->uncached_asr = ASR_MODE_USER; diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c index 6a5414f..dd23d32 100644 --- a/target-xtensa/cpu.c +++ b/target-xtensa/cpu.c @@ -114,7 +114,7 @@ static void xtensa_cpu_initfn(Object *obj) cs->env_ptr = env; env->config = xcc->config; - cpu_exec_init(env); + cpu_exec_init(env, NULL); if (tcg_enabled() && !tcg_inited) { tcg_inited = true;