From patchwork Wed Apr 15 13:24:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 461547 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5381B1401AB for ; Wed, 15 Apr 2015 23:36:44 +1000 (AEST) Received: from localhost ([::1]:60573 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YiNUg-00052e-6E for incoming@patchwork.ozlabs.org; Wed, 15 Apr 2015 09:36:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45949) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YiNSY-0001oA-TA for qemu-devel@nongnu.org; Wed, 15 Apr 2015 09:34:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YiNSS-00079G-Jt for qemu-devel@nongnu.org; Wed, 15 Apr 2015 09:34:30 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:29018) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YiNSS-00078L-0t for qemu-devel@nongnu.org; Wed, 15 Apr 2015 09:34:24 -0400 Received: from 172.24.2.119 (EHLO szxeml427-hub.china.huawei.com) ([172.24.2.119]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BEM19420; Wed, 15 Apr 2015 21:26:32 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml427-hub.china.huawei.com (10.82.67.182) with Microsoft SMTP Server id 14.3.158.1; Wed, 15 Apr 2015 21:26:24 +0800 From: Shannon Zhao To: , , , , , , , , , , Date: Wed, 15 Apr 2015 21:24:54 +0800 Message-ID: <1429104309-3844-6-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1429104309-3844-1-git-send-email-zhaoshenglong@huawei.com> References: <1429104309-3844-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020204.552E6709.0124, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: f82982b58cc6fda0726f1e173aef2608 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 119.145.14.66 Cc: hangaohuai@huawei.com, shannon.zhao@linaro.org, peter.huangpeng@huawei.com, zhaoshenglong@huawei.com Subject: [Qemu-devel] [PATCH v5 05/20] hw/acpi/aml-build: Add aml_interrupt() term X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Shannon Zhao Add aml_interrupt() for describing device interrupt in resource template. These can be used to generating DSDT table for ACPI on ARM. Signed-off-by: Shannon Zhao Signed-off-by: Shannon Zhao --- hw/acpi/aml-build.c | 28 +++++++++++++++++++++++++ include/hw/acpi/aml-build.h | 50 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+) diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 61407b7..babe4d6 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -532,6 +532,34 @@ Aml *aml_memory32_fixed(uint32_t addr, uint32_t size, return var; } +/* + * ACPI 1.0: 6.4.3.6 Interrupt (Interrupt Resource Descriptor Macro) + */ +Aml *aml_interrupt(AmlConsumerAndProducer con_and_pro, + AmlLevelAndEdge level_and_edge, + AmlActiveHighAndLow high_and_low, + AmlExclusiveAndShared exclusive_and_shared, + AmlWakeCap wake_capable, uint32_t irq) +{ + Aml *var = aml_alloc(); + uint8_t irq_flags = con_and_pro | (level_and_edge << 1) + | (high_and_low << 2) | (exclusive_and_shared << 3) + | (wake_capable << 4); + + build_append_byte(var->buf, 0x89); /* Extended irq descriptor */ + build_append_byte(var->buf, 6); /* Length, bits[7:0] minimum value = 6 */ + build_append_byte(var->buf, 0); /* Length, bits[15:8] minimum value = 0 */ + build_append_byte(var->buf, irq_flags); /* Interrupt Vector Information. */ + build_append_byte(var->buf, 0x01); /* Interrupt table length = 1 */ + + /* Interrupt Number */ + build_append_byte(var->buf, extract32(irq, 0, 8)); /* bits[7:0] */ + build_append_byte(var->buf, extract32(irq, 8, 8)); /* bits[15:8] */ + build_append_byte(var->buf, extract32(irq, 16, 8)); /* bits[23:16] */ + build_append_byte(var->buf, extract32(irq, 24, 8)); /* bits[31:24] */ + return var; +} + /* ACPI 1.0b: 6.4.2.5 I/O Port Descriptor */ Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base, uint8_t aln, uint8_t len) diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index 154823b..5b60744 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -105,6 +105,51 @@ typedef enum { aml_ReadWrite = 1, } AmlReadAndWrite; +/* + * ACPI 1.0b: Table 6-28 Extended Interrupt Descriptor Definition + * Interrupt Vector Flags Bits[0] Consumer/Producer + */ +typedef enum { + aml_consumer_producer = 0, + aml_consumer = 1, +} AmlConsumerAndProducer; + +/* + * ACPI 1.0b: Table 6-28 Extended Interrupt Descriptor Definition + * _HE field definition + */ +typedef enum { + aml_level = 0, + aml_edge = 1, +} AmlLevelAndEdge; + +/* + * ACPI 1.0b: Table 6-28 Extended Interrupt Descriptor Definition + * _LL field definition + */ +typedef enum { + aml_active_high = 0, + aml_active_low = 1, +} AmlActiveHighAndLow; + +/* + * ACPI 1.0b: Table 6-28 Extended Interrupt Descriptor Definition + * _SHR field definition + */ +typedef enum { + aml_exclusive = 0, + aml_shared = 1, +} AmlExclusiveAndShared; + +/* + * ACPI 5.1: Table 6-203 Extended Interrupt Descriptor Definition + * _WKC field definition + */ +typedef enum { + aml_not_wake_capable = 0, + aml_wake_capable = 1, +} AmlWakeCap; + typedef struct AcpiBuildTables { GArray *table_data; @@ -164,6 +209,11 @@ Aml *aml_call3(const char *method, Aml *arg1, Aml *arg2, Aml *arg3); Aml *aml_call4(const char *method, Aml *arg1, Aml *arg2, Aml *arg3, Aml *arg4); Aml *aml_memory32_fixed(uint32_t addr, uint32_t size, AmlReadAndWrite read_and_write); +Aml *aml_interrupt(AmlConsumerAndProducer con_and_pro, + AmlLevelAndEdge level_and_edge, + AmlActiveHighAndLow high_and_low, + AmlExclusiveAndShared exclusive_and_shared, + AmlWakeCap wake_capable, uint32_t irq); Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base, uint8_t aln, uint8_t len); Aml *aml_operation_region(const char *name, AmlRegionSpace rs,