From patchwork Mon Mar 2 06:55:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cyril Bur X-Patchwork-Id: 444934 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5149F1400A0 for ; Mon, 2 Mar 2015 17:57:42 +1100 (AEDT) Received: from localhost ([::1]:55270 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YSKIO-0002yM-9h for incoming@patchwork.ozlabs.org; Mon, 02 Mar 2015 01:57:40 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54060) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YSKI2-0002IQ-Gh for qemu-devel@nongnu.org; Mon, 02 Mar 2015 01:57:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YSKHz-0007bx-7p for qemu-devel@nongnu.org; Mon, 02 Mar 2015 01:57:18 -0500 Received: from e23smtp05.au.ibm.com ([202.81.31.147]:44861) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YSKHy-0007aA-FL for qemu-devel@nongnu.org; Mon, 02 Mar 2015 01:57:15 -0500 Received: from /spool/local by e23smtp05.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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PowerISA: The Virtual Time Base (VTB) is a 64-bit incrementing counter. Virtual Time Base increments at the same rate as the Time Base until its value becomes 0xFFFF_FFFF_FFFF_FFFF (2 64 - 1); at the next increment its value becomes 0x0000_0000_0000_0000. There is no interrupt or other indication when this occurs. The operation of the Virtual Time Base has the following additional properties. 1. Loading a GPR from the Virtual Time Base has no effect on the accuracy of the Virtual Time Base. 2. Copying the contents of a GPR to the Virtual Time Base replaces the contents of the Virtual Time Base with the contents of the GPR. Signed-off-by: Cyril Bur --- V2: Drop the use of spr_read_vtb() and just use spr_read_tbl() as a handler for VTB reads Correct the permissions for user mode access of the VTB V3: Fix compilation for target-ppc by moving gen_spr_vtb() to ppc64 only sections --- target-ppc/cpu.h | 1 + target-ppc/translate_init.c | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index b706b9f..abc3545 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1624,6 +1624,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_MPC_MD_DBRAM1 (0x32A) #define SPR_RCPU_L2U_RA3 (0x32B) #define SPR_TAR (0x32F) +#define SPR_VTB (0x351) #define SPR_440_INV0 (0x370) #define SPR_440_INV1 (0x371) #define SPR_440_INV2 (0x372) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index df1a62c..d74f4f0 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7819,6 +7819,15 @@ static void gen_spr_power8_ebb(CPUPPCState *env) KVM_REG_PPC_BESCR, 0x00000000); } +/* Virtual Time Base */ +static void gen_spr_vtb(CPUPPCState *env) +{ + spr_register(env, SPR_VTB, "VTB", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_tbl, SPR_NOACCESS, + 0x00000000); +} + static void gen_spr_power8_fscr(CPUPPCState *env) { #if defined(CONFIG_USER_ONLY) @@ -7881,6 +7890,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) gen_spr_power8_pmu_sup(env); gen_spr_power8_pmu_user(env); gen_spr_power8_tm(env); + gen_spr_vtb(env); } if (version < BOOK3S_CPU_POWER8) { gen_spr_book3s_dbg(env);