From patchwork Fri Feb 27 17:00:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leon Alrae X-Patchwork-Id: 444356 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 53F5C14008F for ; Sat, 28 Feb 2015 04:02:30 +1100 (AEDT) Received: from localhost ([::1]:37612 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YROJ2-0006t4-Gz for incoming@patchwork.ozlabs.org; Fri, 27 Feb 2015 12:02:28 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42796) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YROIA-0005Ao-Lq for qemu-devel@nongnu.org; Fri, 27 Feb 2015 12:01:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YROI4-0004pf-2S for qemu-devel@nongnu.org; Fri, 27 Feb 2015 12:01:34 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:54407) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YROI3-0004pY-I5 for qemu-devel@nongnu.org; Fri, 27 Feb 2015 12:01:28 -0500 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id CA8C813E5DAD2; Fri, 27 Feb 2015 17:01:21 +0000 (GMT) Received: from lalrae-linux.kl.imgtec.org (192.168.14.163) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 27 Feb 2015 17:01:24 +0000 From: Leon Alrae To: Date: Fri, 27 Feb 2015 17:00:52 +0000 Message-ID: <1425056454-27028-3-git-send-email-leon.alrae@imgtec.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1425056454-27028-1-git-send-email-leon.alrae@imgtec.com> References: <1425056454-27028-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [192.168.14.163] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 195.59.15.196 Cc: matthew.fortune@imgtec.com, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 2/4] target-mips: add Unified Hosting Interface (UHI) support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add UHI semihosting support for MIPS. QEMU run with "-semihosting" option will alter the behaviour of SDBBP 1 instruction -- UHI operation will be called instead of generating a debug exception. This commit implements all UHI operations apart from Argc, Argnlen and Argn. Signed-off-by: Leon Alrae --- qemu-options.hx | 5 +- target-mips/Makefile.objs | 2 +- target-mips/helper.h | 2 + target-mips/mips-semi.c | 304 ++++++++++++++++++++++++++++++++++++++++++++++ target-mips/translate.c | 75 ++++++++---- 5 files changed, 360 insertions(+), 28 deletions(-) create mode 100644 target-mips/mips-semi.c diff --git a/qemu-options.hx b/qemu-options.hx index 85ca3ad..99ad1ae 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -3223,11 +3223,12 @@ Set OpenBIOS nvram @var{variable} to given @var{value} (PPC, SPARC only). ETEXI DEF("semihosting", 0, QEMU_OPTION_semihosting, "-semihosting semihosting mode\n", - QEMU_ARCH_ARM | QEMU_ARCH_M68K | QEMU_ARCH_XTENSA | QEMU_ARCH_LM32) + QEMU_ARCH_ARM | QEMU_ARCH_M68K | QEMU_ARCH_XTENSA | QEMU_ARCH_LM32 | + QEMU_ARCH_MIPS) STEXI @item -semihosting @findex -semihosting -Enable semihosting mode (ARM, M68K, Xtensa only). +Enable semihosting mode (ARM, M68K, Xtensa, MIPS only). ETEXI DEF("semihosting-config", HAS_ARG, QEMU_OPTION_semihosting_config, "-semihosting-config [enable=on|off,]target=native|gdb|auto semihosting configuration\n", diff --git a/target-mips/Makefile.objs b/target-mips/Makefile.objs index 108fd9b..bc5ed85 100644 --- a/target-mips/Makefile.objs +++ b/target-mips/Makefile.objs @@ -1,4 +1,4 @@ obj-y += translate.o dsp_helper.o op_helper.o lmi_helper.o helper.o cpu.o -obj-y += gdbstub.o msa_helper.o +obj-y += gdbstub.o msa_helper.o mips-semi.o obj-$(CONFIG_SOFTMMU) += machine.o obj-$(CONFIG_KVM) += kvm.o diff --git a/target-mips/helper.h b/target-mips/helper.h index 3bd0b02..7c7582f 100644 --- a/target-mips/helper.h +++ b/target-mips/helper.h @@ -1,6 +1,8 @@ DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int) DEF_HELPER_2(raise_exception, noreturn, env, i32) +DEF_HELPER_1(do_semihosting, void, env) + #ifdef TARGET_MIPS64 DEF_HELPER_4(sdl, void, env, tl, tl, int) DEF_HELPER_4(sdr, void, env, tl, tl, int) diff --git a/target-mips/mips-semi.c b/target-mips/mips-semi.c new file mode 100644 index 0000000..3bf7b2a --- /dev/null +++ b/target-mips/mips-semi.c @@ -0,0 +1,304 @@ +/* + * Unified Hosting Interface syscalls. + * + * Copyright (c) 2014 Imagination Technologies + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include +#include "cpu.h" +#include "exec/helper-proto.h" +#include "exec/softmmu-semi.h" + +typedef enum UHIOp { + UHI_exit = 1, + UHI_open = 2, + UHI_close = 3, + UHI_read = 4, + UHI_write = 5, + UHI_lseek = 6, + UHI_unlink = 7, + UHI_fstat = 8, + UHI_argc = 9, + UHI_argnlen = 10, + UHI_argn = 11, + UHI_plog = 13, + UHI_assert = 14, + UHI_pread = 19, + UHI_pwrite = 20, + UHI_link = 22 +} UHIOp; + +typedef struct UHIStat { + int16_t uhi_st_dev; + uint16_t uhi_st_ino; + uint32_t uhi_st_mode; + uint16_t uhi_st_nlink; + uint16_t uhi_st_uid; + uint16_t uhi_st_gid; + int16_t uhi_st_rdev; + uint64_t uhi_st_size; + uint64_t uhi_st_atime; + uint64_t uhi_st_spare1; + uint64_t uhi_st_mtime; + uint64_t uhi_st_spare2; + uint64_t uhi_st_ctime; + uint64_t uhi_st_spare3; + uint64_t uhi_st_blksize; + uint64_t uhi_st_blocks; + uint64_t uhi_st_spare4[2]; +} UHIStat; + +enum UHIOpenFlags { + UHIOpen_RDONLY = 0x0, + UHIOpen_WRONLY = 0x1, + UHIOpen_RDWR = 0x2, + UHIOpen_APPEND = 0x8, + UHIOpen_CREAT = 0x200, + UHIOpen_TRUNC = 0x400, + UHIOpen_EXCL = 0x800 +}; + +static int copy_stat_to_target(CPUMIPSState *env, const struct stat *src, + target_ulong vaddr) +{ + hwaddr len = sizeof(struct UHIStat); + UHIStat *dst = lock_user(VERIFY_WRITE, vaddr, len, 0); + if (!dst) { + return -1; + } + + dst->uhi_st_dev = tswap16(src->st_dev); + dst->uhi_st_ino = tswap16(src->st_ino); + dst->uhi_st_mode = tswap32(src->st_mode); + dst->uhi_st_nlink = tswap16(src->st_nlink); + dst->uhi_st_uid = tswap16(src->st_uid); + dst->uhi_st_gid = tswap16(src->st_gid); + dst->uhi_st_rdev = tswap16(src->st_rdev); + dst->uhi_st_size = tswap64(src->st_size); + dst->uhi_st_atime = tswap64(src->st_atime); + dst->uhi_st_mtime = tswap64(src->st_mtime); + dst->uhi_st_ctime = tswap64(src->st_ctime); +#ifdef _WIN32 + dst->uhi_st_blksize = 0; + dst->uhi_st_blocks = 0; +#else + dst->uhi_st_blksize = tswap64(src->st_blksize); + dst->uhi_st_blocks = tswap64(src->st_blocks); +#endif + unlock_user(dst, vaddr, len); + return 0; +} + +static int get_open_flags(target_ulong target_flags) +{ + int open_flags = 0; + + if (target_flags & UHIOpen_RDWR) { + open_flags |= O_RDWR; + } else if (target_flags & UHIOpen_WRONLY) { + open_flags |= O_WRONLY; + } else { + open_flags |= O_RDONLY; + } + + open_flags |= (target_flags & UHIOpen_APPEND) ? O_APPEND : 0; + open_flags |= (target_flags & UHIOpen_CREAT) ? O_CREAT : 0; + open_flags |= (target_flags & UHIOpen_TRUNC) ? O_TRUNC : 0; + open_flags |= (target_flags & UHIOpen_EXCL) ? O_EXCL : 0; + + return open_flags; +} + +static int write_to_file(CPUMIPSState *env, target_ulong fd, target_ulong vaddr, + target_ulong len, target_ulong offset) +{ + int num_of_bytes; + void *dst = lock_user(VERIFY_READ, vaddr, len, 1); + if (!dst) { + return 0; + } + + if (offset) { +#ifdef _WIN32 + num_of_bytes = 0; +#else + num_of_bytes = pwrite(fd, dst, len, offset); +#endif + } else { + num_of_bytes = write(fd, dst, len); + } + + unlock_user(dst, vaddr, 0); + return num_of_bytes; +} + +static int read_from_file(CPUMIPSState *env, target_ulong fd, + target_ulong vaddr, target_ulong len, + target_ulong offset) +{ + int num_of_bytes; + void *dst = lock_user(VERIFY_WRITE, vaddr, len, 0); + if (!dst) { + return 0; + } + + if (offset) { +#ifdef _WIN32 + num_of_bytes = 0; +#else + num_of_bytes = pread(fd, dst, len, offset); +#endif + } else { + num_of_bytes = read(fd, dst, len); + } + + unlock_user(dst, vaddr, len); + return num_of_bytes; +} + +#define GET_TARGET_STRING(p, addr) \ + do { \ + p = lock_user_string(addr); \ + if (!p) { \ + gpr[2] = -1; \ + gpr[3] = ENAMETOOLONG; \ + goto uhi_done; \ + } \ + } while (0) + +#define FREE_TARGET_STRING(p, gpr) \ + do { \ + unlock_user(p, gpr, 0); \ + } while (0) + +void helper_do_semihosting(CPUMIPSState *env) +{ + target_ulong *gpr = env->active_tc.gpr; + const UHIOp op = gpr[25]; + char *p, *p2; + + switch (op) { + case UHI_exit: + qemu_log("UHI(%d): exit(%d)\n", op, (int)gpr[4]); + exit(gpr[4]); + case UHI_open: + GET_TARGET_STRING(p, gpr[4]); + if (!strcmp("/dev/stdin", p)) { + gpr[2] = 0; + } else if (!strcmp("/dev/stdout", p)) { + gpr[2] = 1; + } else if (!strcmp("/dev/stderr", p)) { + gpr[2] = 2; + } else { + gpr[2] = open(p, get_open_flags(gpr[5]), gpr[6]); + gpr[3] = errno; + } + FREE_TARGET_STRING(p, gpr[4]); + break; + case UHI_close: + if (gpr[4] < 3) { + /* ignore closing stdin/stdout/stderr */ + gpr[2] = 0; + goto uhi_done; + } + gpr[2] = close(gpr[4]); + gpr[3] = errno; + break; + case UHI_read: + gpr[2] = read_from_file(env, gpr[4], gpr[5], gpr[6], 0); + gpr[3] = errno; + break; + case UHI_write: + gpr[2] = write_to_file(env, gpr[4], gpr[5], gpr[6], 0); + gpr[3] = errno; + break; + case UHI_lseek: + gpr[2] = lseek(gpr[4], gpr[5], gpr[6]); + gpr[3] = errno; + break; + case UHI_unlink: + GET_TARGET_STRING(p, gpr[4]); + gpr[2] = remove(p); + gpr[3] = errno; + FREE_TARGET_STRING(p, gpr[4]); + break; + case UHI_fstat: + { + struct stat sbuf; + memset(&sbuf, 0, sizeof(sbuf)); + gpr[2] = fstat(gpr[4], &sbuf); + gpr[3] = errno; + if (gpr[2]) { + goto uhi_done; + } + gpr[2] = copy_stat_to_target(env, &sbuf, gpr[5]); + } + break; + case UHI_argc: + case UHI_argnlen: + case UHI_argn: + /* TODO */ + break; + case UHI_plog: + GET_TARGET_STRING(p, gpr[4]); + p2 = strstr(p, "%d"); + if (p2) { + int char_num = p2 - p; + char *buf = g_malloc(char_num + 1); + strncpy(buf, p, char_num); + buf[char_num] = '\0'; + gpr[2] = printf("%s%d%s", buf, (int)gpr[5], p2 + 2); + g_free(buf); + } else { + gpr[2] = printf("%s", p); + } + FREE_TARGET_STRING(p, gpr[4]); + break; + case UHI_assert: + GET_TARGET_STRING(p, gpr[4]); + GET_TARGET_STRING(p2, gpr[5]); + printf("assertion '"); + printf("\"%s\"", p); + printf("': file \"%s\", line %d\n", p2, (int)gpr[6]); + FREE_TARGET_STRING(p2, gpr[5]); + FREE_TARGET_STRING(p, gpr[4]); + abort(); + break; + case UHI_pread: + gpr[2] = read_from_file(env, gpr[4], gpr[5], gpr[6], gpr[7]); + gpr[3] = errno; + break; + case UHI_pwrite: + gpr[2] = write_to_file(env, gpr[4], gpr[5], gpr[6], gpr[7]); + gpr[3] = errno; + break; +#ifndef _WIN32 + case UHI_link: + GET_TARGET_STRING(p, gpr[4]); + GET_TARGET_STRING(p2, gpr[5]); + gpr[2] = link(p, p2); + gpr[3] = errno; + FREE_TARGET_STRING(p2, gpr[5]); + FREE_TARGET_STRING(p, gpr[4]); + break; +#endif + default: + fprintf(stderr, "Unknown UHI operation %d\n", op); + abort(); + } +uhi_done: + return; +} diff --git a/target-mips/translate.c b/target-mips/translate.c index ca51149..82fa5a4 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -25,6 +25,7 @@ #include "disas/disas.h" #include "tcg-op.h" #include "exec/cpu_ldst.h" +#include "sysemu/sysemu.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" @@ -11267,6 +11268,15 @@ static int decode_extended_mips16_opc (CPUMIPSState *env, DisasContext *ctx) return 4; } +static inline bool is_uhi(int sdbbp_code) +{ +#ifdef CONFIG_USER_ONLY + return false; +#else + return semihosting_enabled && sdbbp_code == 1; +#endif +} + static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx) { int rx, ry; @@ -11566,14 +11576,18 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx) } break; case RR_SDBBP: - /* XXX: not clear which exception should be raised - * when in debug mode... - */ - check_insn(ctx, ISA_MIPS32); - if (!(ctx->hflags & MIPS_HFLAG_DM)) { - generate_exception(ctx, EXCP_DBp); + if (is_uhi(extract32(ctx->opcode, 5, 6))) { + gen_helper_do_semihosting(cpu_env); } else { - generate_exception(ctx, EXCP_DBp); + /* XXX: not clear which exception should be raised + * when in debug mode... + */ + check_insn(ctx, ISA_MIPS32); + if (!(ctx->hflags & MIPS_HFLAG_DM)) { + generate_exception(ctx, EXCP_DBp); + } else { + generate_exception(ctx, EXCP_DBp); + } } break; case RR_SLT: @@ -12421,14 +12435,18 @@ static void gen_pool16c_insn(DisasContext *ctx) generate_exception(ctx, EXCP_BREAK); break; case SDBBP16: - /* XXX: not clear which exception should be raised - * when in debug mode... - */ - check_insn(ctx, ISA_MIPS32); - if (!(ctx->hflags & MIPS_HFLAG_DM)) { - generate_exception(ctx, EXCP_DBp); + if (is_uhi(extract32(ctx->opcode, 0, 4))) { + gen_helper_do_semihosting(cpu_env); } else { - generate_exception(ctx, EXCP_DBp); + /* XXX: not clear which exception should be raised + * when in debug mode... + */ + check_insn(ctx, ISA_MIPS32); + if (!(ctx->hflags & MIPS_HFLAG_DM)) { + generate_exception(ctx, EXCP_DBp); + } else { + generate_exception(ctx, EXCP_DBp); + } } break; case JRADDIUSP + 0: @@ -16190,10 +16208,14 @@ static void decode_opc_special_r6(CPUMIPSState *env, DisasContext *ctx) } break; case R6_OPC_SDBBP: - if (ctx->hflags & MIPS_HFLAG_SBRI) { - generate_exception(ctx, EXCP_RI); + if (is_uhi(extract32(ctx->opcode, 6, 20))) { + gen_helper_do_semihosting(cpu_env); } else { - generate_exception(ctx, EXCP_DBp); + if (ctx->hflags & MIPS_HFLAG_SBRI) { + generate_exception(ctx, EXCP_RI); + } else { + generate_exception(ctx, EXCP_DBp); + } } break; #if defined(TARGET_MIPS64) @@ -16563,16 +16585,19 @@ static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx) gen_cl(ctx, op1, rd, rs); break; case OPC_SDBBP: - /* XXX: not clear which exception should be raised - * when in debug mode... - */ - check_insn(ctx, ISA_MIPS32); - if (!(ctx->hflags & MIPS_HFLAG_DM)) { - generate_exception(ctx, EXCP_DBp); + if (is_uhi(extract32(ctx->opcode, 6, 20))) { + gen_helper_do_semihosting(cpu_env); } else { - generate_exception(ctx, EXCP_DBp); + /* XXX: not clear which exception should be raised + * when in debug mode... + */ + check_insn(ctx, ISA_MIPS32); + if (!(ctx->hflags & MIPS_HFLAG_DM)) { + generate_exception(ctx, EXCP_DBp); + } else { + generate_exception(ctx, EXCP_DBp); + } } - /* Treat as NOP. */ break; #if defined(TARGET_MIPS64) case OPC_DCLO: