From patchwork Tue Feb 17 02:08:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 440431 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id DA765140327 for ; Tue, 17 Feb 2015 13:15:24 +1100 (AEDT) Received: from localhost ([::1]:43472 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YNXh4-0001tM-V1 for incoming@patchwork.ozlabs.org; Mon, 16 Feb 2015 21:15:22 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38133) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YNXcR-00014p-Vy for qemu-devel@nongnu.org; Mon, 16 Feb 2015 21:10:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YNXcL-00069L-Lx for qemu-devel@nongnu.org; Mon, 16 Feb 2015 21:10:35 -0500 Received: from szxga03-in.huawei.com ([119.145.14.66]:9960) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YNXcK-00068a-So for qemu-devel@nongnu.org; Mon, 16 Feb 2015 21:10:29 -0500 Received: from 172.24.2.119 (EHLO szxeml428-hub.china.huawei.com) ([172.24.2.119]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BCA51710; Tue, 17 Feb 2015 10:10:15 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml428-hub.china.huawei.com (10.82.67.183) with Microsoft SMTP Server id 14.3.158.1; Tue, 17 Feb 2015 10:10:08 +0800 From: Shannon Zhao To: , , , , , , , , , Date: Tue, 17 Feb 2015 10:08:43 +0800 Message-ID: <1424138929-10044-6-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1424138929-10044-1-git-send-email-zhaoshenglong@huawei.com> References: <1424138929-10044-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.54E2A307.0068, ss=1, re=0.001, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: aa3f9e26f9bbc0cf5617e80c7388e6ff X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 119.145.14.66 Cc: wanghaibin.wang@huawei.com, hangaohuai@huawei.com, peter.huangpeng@huawei.com Subject: [Qemu-devel] [RFC PATCH v3 05/11] hw/arm/virt-acpi-build: Generation of DSDT table for virt devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org DSDT consists of the usual common table header plus a definition block in AML encoding which describes all devices in the platform. After initializing DSDT with header information the namespace is created which is followed by the device encodings. The devices are described using the Resource Template for the 32-Bit Fixed Memory Range and the Extended Interrupt Descriptors. Signed-off-by: Shannon Zhao --- hw/arm/virt-acpi-build.c | 133 ++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 133 insertions(+), 0 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 647a1fd..dec70a9 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -57,6 +57,133 @@ #define ACPI_BUILD_DPRINTF(fmt, ...) #endif +static void acpi_dsdt_add_cpus(Aml *scope, int max_cpus) +{ + Aml *dev, *crs; + int i; + char name[5]; + for (i = 0; i < max_cpus; i++) { + snprintf(name, 5, "CPU%u", i); + dev = aml_device("%s", name); + aml_append(dev, aml_name_decl("_HID", aml_string("ACPI007"))); + aml_append(dev, aml_name_decl("_UID", aml_int(i))); + crs = aml_resource_template(); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); + } +} + +static void acpi_dsdt_add_uart(Aml *scope, const hwaddr *uart_addr, + const int *uart_irq) +{ + Aml *dev, *crs; + + dev = aml_device("COM0"); + aml_append(dev, aml_name_decl("_HID", aml_string("ARMH0011"))); + aml_append(dev, aml_name_decl("_UID", aml_int(0))); + + crs = aml_resource_template(); + aml_append(crs, + aml_memory32_fixed(uart_addr[0], uart_addr[1], 0x01)); + aml_append(crs, + aml_interrupt(0x01, *uart_irq + 32)); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + +static void acpi_dsdt_add_rtc(Aml *scope, const hwaddr *rtc_addr, + const int *rtc_irq) +{ + Aml *dev, *crs; + + dev = aml_device("RTC0"); + aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0013"))); + aml_append(dev, aml_name_decl("_UID", aml_int(0))); + + crs = aml_resource_template(); + aml_append(crs, + aml_memory32_fixed(rtc_addr[0], rtc_addr[1], 0x01)); + aml_append(crs, + aml_interrupt(0x01, *rtc_irq + 32)); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + +static void acpi_dsdt_add_flash(Aml *scope, const hwaddr *flash_addr) +{ + Aml *dev, *crs; + hwaddr base = flash_addr[0]; + hwaddr size = flash_addr[1]; + + dev = aml_device("FLS0"); + aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0015"))); + aml_append(dev, aml_name_decl("_UID", aml_int(0))); + + crs = aml_resource_template(); + aml_append(crs, + aml_memory32_fixed(base, size, 0x01)); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); + + dev = aml_device("FLS1"); + aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0015"))); + aml_append(dev, aml_name_decl("_UID", aml_int(1))); + crs = aml_resource_template(); + aml_append(crs, + aml_memory32_fixed(base + size, size, 0x01)); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + +static void acpi_dsdt_add_virtio(Aml *scope, const hwaddr *mmio_addrs, + const int *mmio_irq, int num) +{ + Aml *dev, *crs; + hwaddr base = mmio_addrs[0]; + hwaddr size = mmio_addrs[1]; + int irq = *mmio_irq + 32; + int i; + char name[5]; + + for (i = 0; i < num; i++) { + snprintf(name, 5, "VR%02u", i); + dev = aml_device("%s", name); + aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0005"))); + aml_append(dev, aml_name_decl("_UID", aml_int(i))); + + crs = aml_resource_template(); + aml_append(crs, + aml_memory32_fixed(base, size, 0x01)); + aml_append(crs, + aml_interrupt(0x01, irq + i)); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); + base += size; + } +} + +/* DSDT */ +static void +build_dsdt(Aml *table_data, GArray *linker, VirtGuestInfo *guest_info) +{ + Aml *scope, *dsdt; + const struct acpi_dsdt_info *info = guest_info->dsdt_info; + + dsdt = aml_def_block("DSDT", 1, ACPI_BUILD_APPNAME6, + ACPI_BUILD_APPNAME4, 1, + ACPI_BUILD_APPNAME4_HEX, 1); + scope = aml_scope("\\_SB"); + acpi_dsdt_add_cpus(scope, guest_info->max_cpus); + acpi_dsdt_add_uart(scope, info->uart_addr, info->uart_irq); + acpi_dsdt_add_rtc(scope, info->rtc_addr, info->rtc_irq); + acpi_dsdt_add_flash(scope, info->flash_addr); + acpi_dsdt_add_virtio(scope, info->virtio_mmio_addr, + info->virtio_mmio_irq, info->virtio_mmio_num); + + aml_append(dsdt, scope); + aml_append(table_data, dsdt); +} + typedef struct AcpiBuildState { /* Copy of table in RAM (for patching). */ @@ -74,6 +201,8 @@ static void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables) { GArray *table_offsets; + unsigned dsdt; + GArray *tables_blob = tables->table_data->buf; table_offsets = g_array_new(false, true /* clear */, sizeof(uint32_t)); @@ -91,6 +220,10 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables) * DSDT */ + /* DSDT is pointed to by FADT */ + dsdt = tables_blob->len; + build_dsdt(tables->table_data, tables->linker, guest_info); + /* Cleanup memory that's no longer used. */ g_array_free(table_offsets, true); }