From patchwork Fri Jan 30 21:06:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Don Slutz X-Patchwork-Id: 435020 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 51F541402A6 for ; Sat, 31 Jan 2015 08:09:08 +1100 (AEDT) Received: from localhost ([::1]:38670 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YHIoM-00076q-Dq for incoming@patchwork.ozlabs.org; Fri, 30 Jan 2015 16:09:06 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56673) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YHImE-0003cO-41 for qemu-devel@nongnu.org; Fri, 30 Jan 2015 16:07:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YHIm6-0001Ct-1w for qemu-devel@nongnu.org; Fri, 30 Jan 2015 16:06:54 -0500 Received: from omzsmtpe04.verizonbusiness.com ([199.249.25.207]:16256) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YHIm5-0001C9-On for qemu-devel@nongnu.org; Fri, 30 Jan 2015 16:06:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verizon.com; i=@verizon.com; q=dns/txt; s=corp; t=1422652005; x=1454188005; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=u6YPnBe/fN58t9uLsGGpEbd2wyQhn2d/CGpLFgfWydM=; b=UbMTDG/MKbrYTQjpBDZktuIhfTBMdiwKfefVqCGFMjbqRpu1865W0q5X XoIY7dTxw3xCNjSPFGFMIJmrJLr09aTipeqVtS50yd6Pa5GKRYN16k7Uv YbYYy/9V1ssfnUzU8tphO+uLnzu7TiCsieSOdzrLPNvBIx3UzAXRMF3Uc o=; X-IronPort-Anti-Spam-Filtered: false Received: from unknown (HELO fldsmtpi03.verizon.com) ([166.68.71.145]) by omzsmtpe04.verizonbusiness.com with ESMTP; 30 Jan 2015 21:06:36 +0000 X-VzAPP: 1 X-IronPort-AV: E=Sophos;i="5.09,493,1418083200"; d="scan'208";a="928636786" Received: from unknown (HELO don-760.CloudSwitch.com) ([70.105.104.15]) by fldsmtpi03.verizon.com with ESMTP; 30 Jan 2015 21:06:34 +0000 From: Don Slutz To: qemu-devel@nongnu.org Date: Fri, 30 Jan 2015 16:06:25 -0500 Message-Id: <1422651986-19312-6-git-send-email-dslutz@verizon.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1422651986-19312-1-git-send-email-dslutz@verizon.com> References: <1422651986-19312-1-git-send-email-dslutz@verizon.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 199.249.25.207 Cc: "Michael S. Tsirkin" , Markus Armbruster , Don Slutz , Luiz Capitulino , Anthony Liguori , Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson Subject: [Qemu-devel] [PATCH 5/6] vmport: Add VMware all ring hack X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This is done by adding a new machine property vmware-port-ring3 that needs to be enabled to have any effect. It only effects accel=tcg mode. It is needed if you want to use VMware tools in accel=tcg mode. Signed-off-by: Don Slutz (cherry picked from commit 6d99c91fc9ae27b476e89a8cc880b4a46e237536) --- hw/i386/pc.c | 28 +++++++++++++++++++++++++++- hw/i386/pc_piix.c | 2 +- hw/i386/pc_q35.c | 2 +- include/hw/i386/pc.h | 6 +++++- target-i386/cpu.c | 4 ++++ target-i386/cpu.h | 2 ++ target-i386/seg_helper.c | 6 ++++++ 7 files changed, 46 insertions(+), 4 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index efae4d5..3999bbf 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1012,7 +1012,9 @@ void pc_hot_add_cpu(const int64_t id, Error **errp) pc_new_cpu(current_cpu_model, apic_id, icc_bridge, errp); } -void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge) +/* vmware_port_ring3 true says enable VMware port access in ring3. */ +void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge, + bool vmware_port_ring3) { int i; X86CPU *cpu = NULL; @@ -1044,6 +1046,9 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge) error_free(error); exit(1); } + if (vmware_port_ring3) { + cpu->env.hflags2 |= HF2_VMPORT_HACK_MASK; + } } /* map APIC MMIO area if CPU has APIC */ @@ -1774,6 +1779,21 @@ static bool pc_machine_get_aligned_dimm(Object *obj, Error **errp) return pcms->enforce_aligned_dimm; } +static bool pc_machine_get_vmware_port_ring3(Object *obj, Error **errp) +{ + PCMachineState *pcms = PC_MACHINE(obj); + + return pcms->vmware_port_ring3; +} + +static void pc_machine_set_vmware_port_ring3(Object *obj, bool value, + Error **errp) +{ + PCMachineState *pcms = PC_MACHINE(obj); + + pcms->vmware_port_ring3 = value; +} + static void pc_machine_initfn(Object *obj) { PCMachineState *pcms = PC_MACHINE(obj); @@ -1804,6 +1824,12 @@ static void pc_machine_initfn(Object *obj) object_property_add_bool(obj, PC_MACHINE_ENFORCE_ALIGNED_DIMM, pc_machine_get_aligned_dimm, NULL, NULL); + + pcms->vmware_port_ring3 = false; + object_property_add_bool(obj, PC_MACHINE_VMWARE_PORT_RING3, + pc_machine_get_vmware_port_ring3, + pc_machine_set_vmware_port_ring3, + NULL); } static void pc_machine_class_init(ObjectClass *oc, void *data) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 38b42b0..8434c04 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -146,7 +146,7 @@ static void pc_init1(MachineState *machine, object_property_add_child(qdev_get_machine(), "icc-bridge", OBJECT(icc_bridge), NULL); - pc_cpus_init(machine->cpu_model, icc_bridge); + pc_cpus_init(machine->cpu_model, icc_bridge, pc_machine->vmware_port_ring3); if (kvm_enabled() && kvmclock_enabled) { kvmclock_create(); diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 63027ee..d952fa1 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -135,7 +135,7 @@ static void pc_q35_init(MachineState *machine) object_property_add_child(qdev_get_machine(), "icc-bridge", OBJECT(icc_bridge), NULL); - pc_cpus_init(machine->cpu_model, icc_bridge); + pc_cpus_init(machine->cpu_model, icc_bridge, pc_machine->vmware_port_ring3); pc_acpi_init("q35-acpi-dsdt.aml"); kvmclock_create(); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 69d9cf8..d31f157 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -40,6 +40,7 @@ struct PCMachineState { uint64_t max_ram_below_4g; OnOffAuto vmport; + bool vmware_port_ring3; bool enforce_aligned_dimm; }; @@ -48,6 +49,7 @@ struct PCMachineState { #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" #define PC_MACHINE_VMPORT "vmport" #define PC_MACHINE_ENFORCE_ALIGNED_DIMM "enforce-aligned-dimm" +#define PC_MACHINE_VMWARE_PORT_RING3 "vmware-port-ring3" /** * PCMachineClass: @@ -177,7 +179,9 @@ extern int fd_bootchk; void pc_register_ferr_irq(qemu_irq irq); void pc_acpi_smi_interrupt(void *opaque, int irq, int level); -void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); +/* vmware_port_ring3 true says enable VMware port access in ring3. */ +void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge, + bool vmware_port_ring3); void pc_hot_add_cpu(const int64_t id, Error **errp); void pc_acpi_init(const char *default_dsdt); diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 3a9b32e..a787599 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2594,6 +2594,7 @@ static void x86_cpu_reset(CPUState *s) X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); CPUX86State *env = &cpu->env; int i; + bool save_vmware_port_ring3 = env->hflags2 & HF2_VMPORT_HACK_MASK; xcc->parent_reset(s); @@ -2609,6 +2610,9 @@ static void x86_cpu_reset(CPUState *s) env->hflags |= HF_SOFTMMU_MASK; #endif env->hflags2 |= HF2_GIF_MASK; + if (save_vmware_port_ring3) { + env->hflags2 |= HF2_VMPORT_HACK_MASK; + } cpu_x86_update_cr0(env, 0x60000010); env->a20_mask = ~0x0; diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 478450c..b5e2b68 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -186,11 +186,13 @@ #define HF2_HIF_SHIFT 1 /* value of IF_MASK when entering SVM */ #define HF2_NMI_SHIFT 2 /* CPU serving NMI */ #define HF2_VINTR_SHIFT 3 /* value of V_INTR_MASKING bit */ +#define HF2_VMPORT_HACK_SHIFT 4 /* skip iopl checking for VMware port */ #define HF2_GIF_MASK (1 << HF2_GIF_SHIFT) #define HF2_HIF_MASK (1 << HF2_HIF_SHIFT) #define HF2_NMI_MASK (1 << HF2_NMI_SHIFT) #define HF2_VINTR_MASK (1 << HF2_VINTR_SHIFT) +#define HF2_VMPORT_HACK_MASK (1 << HF2_VMPORT_HACK_SHIFT) #define CR0_PE_SHIFT 0 #define CR0_MP_SHIFT 1 diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index fa374d0..a1e6a2c 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -2566,6 +2566,12 @@ static inline void check_io(CPUX86State *env, int addr, int size) { int io_offset, val, mask; + /* vmport hack: skip iopl checking for VMware port 0x5658 (see + * vmport_realizefn()) */ + if ((env->hflags2 & HF2_VMPORT_HACK_MASK) && (addr == 0x5658)) { + return; + } + /* TSS must be a valid 32 bit one */ if (!(env->tr.flags & DESC_P_MASK) || ((env->tr.flags >> DESC_TYPE_SHIFT) & 0xf) != 9 ||