From patchwork Thu Jan 29 09:27:22 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Kardashevskiy X-Patchwork-Id: 434477 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5CA1C1402D1 for ; Thu, 29 Jan 2015 20:47:09 +1100 (AEDT) Received: from localhost ([::1]:58589 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YGlgp-0003da-1N for incoming@patchwork.ozlabs.org; Thu, 29 Jan 2015 04:47:07 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42638) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YGlOM-0005Zy-FV for qemu-devel@nongnu.org; Thu, 29 Jan 2015 04:28:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YGlO8-0004KT-4Z for qemu-devel@nongnu.org; Thu, 29 Jan 2015 04:28:02 -0500 Received: from e23smtp03.au.ibm.com ([202.81.31.145]:38776) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YGlO7-0004Gp-55 for qemu-devel@nongnu.org; Thu, 29 Jan 2015 04:27:47 -0500 Received: from /spool/local by e23smtp03.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Will be squashed later. Signed-off-by: Alexey Kardashevskiy Reviewed-by: David Gibson --- include/hw/pci-host/spapr.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 5c91387..eec95f3 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -49,6 +49,27 @@ struct sPAPRPHBClass { PCIHostBridgeClass parent_class; void (*finish_realize)(sPAPRPHBState *sphb, Error **errp); + +/* sPAPR spec defined pagesize mask values */ +#define DDW_PGSIZE_4K 0x01 +#define DDW_PGSIZE_64K 0x02 +#define DDW_PGSIZE_16M 0x04 +#define DDW_PGSIZE_32M 0x08 +#define DDW_PGSIZE_64M 0x10 +#define DDW_PGSIZE_128M 0x20 +#define DDW_PGSIZE_256M 0x40 +#define DDW_PGSIZE_16G 0x80 +#define DDW_PGSIZE_MASK 0xFF + + int (*ddw_query)(sPAPRPHBState *sphb, uint32_t *windows_supported, + uint32_t *page_size_mask, + uint32_t *dma32_window_size, + uint64_t *dma64_window_size); + int (*ddw_create)(sPAPRPHBState *sphb, uint32_t liobn, + uint32_t page_shift, uint32_t window_shift, + sPAPRTCETable **ptcet); + int (*ddw_remove)(sPAPRPHBState *sphb, sPAPRTCETable *tcet); + int (*ddw_reset)(sPAPRPHBState *sphb); }; typedef struct spapr_pci_msi {