From patchwork Thu Dec 18 16:34:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Musta X-Patchwork-Id: 422615 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 091DA1400B7 for ; Fri, 19 Dec 2014 03:43:16 +1100 (AEDT) Received: from localhost ([::1]:54761 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y1eAU-0002x2-6M for incoming@patchwork.ozlabs.org; Thu, 18 Dec 2014 11:43:14 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34577) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y1e3y-0000YT-GD for qemu-devel@nongnu.org; Thu, 18 Dec 2014 11:36:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Y1e3n-0006cA-JX for qemu-devel@nongnu.org; Thu, 18 Dec 2014 11:36:30 -0500 Received: from mail-ig0-x22d.google.com ([2607:f8b0:4001:c05::22d]:64970) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y1e3n-0006bi-Es; Thu, 18 Dec 2014 11:36:19 -0500 Received: by mail-ig0-f173.google.com with SMTP id r2so1170795igi.12; Thu, 18 Dec 2014 08:36:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lqhPS5DkBUej2d52ESd+FNs1+9CCwA9EcL/qwyspHx0=; b=wTWIKI0hGEJfro7iH4V0Al62rESibfD8nsKIjEjTfqrjVMXmOEzPy+gxIp1J2LdyXR IKHpXjXVmwKlspoSziZkWm4XAaJyKNJwbcW3IZF9hWjsmB1pyEWrt3N0H+SO8yIpFGXH Uuvh0hXTClTgsuw7ylmgYoGuvPlg0yV3YS31jY43+H2D0JkQtjI32lm4qc6B6nuVKF6C WeaH3sB+hFEP7NppWfqBRrK4gAoLLRMVAqMVKHnEDx9RfkCV4q5sDzyoTx7xRvhE9MGC SGe1Hap9/RR6ecPf5gX8lHc+cQRgQmveltpGoqeYFt+HgZCjjaG9UX4K62FlkQARDlYn 1CjA== X-Received: by 10.107.149.13 with SMTP id x13mr2667105iod.35.1418920578987; Thu, 18 Dec 2014 08:36:18 -0800 (PST) Received: from tmusta-sc.rchland.ibm.com (rchp4.rochester.ibm.com. [129.42.161.36]) by mx.google.com with ESMTPSA id n4sm9436024igr.15.2014.12.18.08.36.17 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 18 Dec 2014 08:36:18 -0800 (PST) From: Tom Musta To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Date: Thu, 18 Dec 2014 10:34:29 -0600 Message-Id: <1418920477-11669-2-git-send-email-tommusta@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1418920477-11669-1-git-send-email-tommusta@gmail.com> References: <1418920477-11669-1-git-send-email-tommusta@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4001:c05::22d Cc: Tom Musta , agraf@suse.de Subject: [Qemu-devel] [PATCH 1/9] target-ppc: Introduce Instruction Type for Transactional Memory X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add a category (PPC2_TM) for the Transactional Memory instructions introduced in Power ISA 2.07. Signed-off-by: Tom Musta --- target-ppc/cpu.h | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 068fcb2..3510083 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -2010,6 +2010,8 @@ enum { PPC2_ISA207S = 0x0000000000008000ULL, /* Double precision floating point conversion for signed integer 64 */ PPC2_FP_CVT_S64 = 0x0000000000010000ULL, + /* Transactional Memory (ISA 2.07, Book II) */ + PPC2_TM = 0x0000000000020000ULL, #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \ PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \ @@ -2017,7 +2019,7 @@ enum { PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \ PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \ PPC2_ALTIVEC_207 | PPC2_ISA207S | PPC2_DFP | \ - PPC2_FP_CVT_S64) + PPC2_FP_CVT_S64 | PPC2_TM) }; /*****************************************************************************/