| Message ID | 1417130307-17714-3-git-send-email-lersek@redhat.com |
|---|---|
| State | New |
| Headers | show |
On 27 November 2014 at 23:18, Laszlo Ersek <lersek@redhat.com> wrote: > fw_cfg already supports exposure over MMIO (used in ppc/mac_newworld.c, > ppc/mac_oldworld.c, sparc/sun4m.c); we can easily add it to the "virt" > board. > > The mmio register block of fw_cfg is advertized in the device tree. As > base address we pick 0x09020000, which conforms to the comment preceding > "a15memmap": it falls in the miscellaneous device I/O range 128MB..256MB, > and it is aligned at 64KB. > + nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); > + qemu_fdt_add_subnode(vbi->fdt, nodename); > + qemu_fdt_setprop_string(vbi->fdt, nodename, > + "compatible", "fw-cfg,mmio"); > + qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg", > + 2, base, 2, FW_CFG_SIZE, > + 2, base + FW_CFG_SIZE, 2, FW_CFG_DATA_SIZE); > + g_free(nodename); Are you planning to submit this DT binding to the kernel folks as a proper official one (ie documented)? I know the kernel doesn't need to read/write it, but the kernel doc tree is AFAIK the only place that's actually documenting ARM DT bindings right now... thanks -- PMM
On 11/28/14 00:28, Peter Maydell wrote: > On 27 November 2014 at 23:18, Laszlo Ersek <lersek@redhat.com> wrote: >> fw_cfg already supports exposure over MMIO (used in ppc/mac_newworld.c, >> ppc/mac_oldworld.c, sparc/sun4m.c); we can easily add it to the "virt" >> board. >> >> The mmio register block of fw_cfg is advertized in the device tree. As >> base address we pick 0x09020000, which conforms to the comment preceding >> "a15memmap": it falls in the miscellaneous device I/O range 128MB..256MB, >> and it is aligned at 64KB. > >> + nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); >> + qemu_fdt_add_subnode(vbi->fdt, nodename); >> + qemu_fdt_setprop_string(vbi->fdt, nodename, >> + "compatible", "fw-cfg,mmio"); >> + qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg", >> + 2, base, 2, FW_CFG_SIZE, >> + 2, base + FW_CFG_SIZE, 2, FW_CFG_DATA_SIZE); >> + g_free(nodename); > > Are you planning to submit this DT binding to the kernel folks > as a proper official one (ie documented)? I know the kernel > doesn't need to read/write it, but the kernel doc tree is > AFAIK the only place that's actually documenting ARM DT > bindings right now... Thanks for the hint, I was actually wondering if some official registry existed for the node names and types. So yeah I'll attempt to get it in there. (Once I find the docs in question in the kernel :)) Thanks! Laszlo
On 27 November 2014 at 23:34, Laszlo Ersek <lersek@redhat.com> wrote: > Thanks for the hint, I was actually wondering if some official registry > existed for the node names and types. So yeah I'll attempt to get it in > there. (Once I find the docs in question in the kernel :)) Documentation/devicetree is probably a good place to start looking. -- PMM
On Fri, Nov 28, 2014 at 12:18:27AM +0100, Laszlo Ersek wrote: > fw_cfg already supports exposure over MMIO (used in ppc/mac_newworld.c, > ppc/mac_oldworld.c, sparc/sun4m.c); we can easily add it to the "virt" > board. > > The mmio register block of fw_cfg is advertized in the device tree. As > base address we pick 0x09020000, which conforms to the comment preceding > "a15memmap": it falls in the miscellaneous device I/O range 128MB..256MB, > and it is aligned at 64KB. > > fw_cfg automatically exports a number of files to the guest; for example, > "bootorder" (see fw_cfg_machine_reset()). > > Signed-off-by: Laszlo Ersek <lersek@redhat.com> > --- > hw/arm/virt.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/hw/arm/virt.c b/hw/arm/virt.c > index 314e55b..070bd34 100644 > --- a/hw/arm/virt.c > +++ b/hw/arm/virt.c > @@ -68,6 +68,7 @@ enum { > VIRT_UART, > VIRT_MMIO, > VIRT_RTC, > + VIRT_FW_CFG, > }; > > typedef struct MemMapEntry { > @@ -107,6 +108,7 @@ static const MemMapEntry a15memmap[] = { > [VIRT_GIC_CPU] = { 0x08010000, 0x00010000 }, > [VIRT_UART] = { 0x09000000, 0x00001000 }, > [VIRT_RTC] = { 0x09010000, 0x00001000 }, > + [VIRT_FW_CFG] = { 0x09020000, FW_CFG_SIZE + FW_CFG_DATA_SIZE }, > [VIRT_MMIO] = { 0x0a000000, 0x00000200 }, > /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */ > /* 0x10000000 .. 0x40000000 reserved for PCI */ > @@ -519,6 +521,23 @@ static void create_flash(const VirtBoardInfo *vbi) > g_free(nodename); > } > > +static void create_fw_cfg(const VirtBoardInfo *vbi) > +{ > + hwaddr base = vbi->memmap[VIRT_FW_CFG].base; > + char *nodename; > + > + fw_cfg_init(0, 0, base, base + FW_CFG_SIZE); > + > + nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); > + qemu_fdt_add_subnode(vbi->fdt, nodename); > + qemu_fdt_setprop_string(vbi->fdt, nodename, > + "compatible", "fw-cfg,mmio"); > + qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg", > + 2, base, 2, FW_CFG_SIZE, > + 2, base + FW_CFG_SIZE, 2, FW_CFG_DATA_SIZE); Overkill suggestion alert, but how about defining something like #define FW_CFG_SIZE_ALIGNED \ MIN(QEMU_ALIGN_UP(FW_CFG_SIZE, FW_CFG_DATA_SIZE), \ QEMU_ALIGN_UP(FW_CFG_SIZE, 4)) and then using that in your memmap size calculation and fw-cfg-data base address calculation. The only reason I suggest this is because it's hard to tell that fw-cfg-data's address will be naturally aligned without hunting down the definition of FW_CFG_DATA_SIZE. And, if it were to change (which it probably never will), then it may not be. > + g_free(nodename); > +} > + > static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size) > { > const VirtBoardInfo *board = (const VirtBoardInfo *)binfo; > @@ -604,6 +623,8 @@ static void machvirt_init(MachineState *machine) > */ > create_virtio_devices(vbi, pic); > > + create_fw_cfg(vbi); > + > vbi->bootinfo.ram_size = machine->ram_size; > vbi->bootinfo.kernel_filename = machine->kernel_filename; > vbi->bootinfo.kernel_cmdline = machine->kernel_cmdline; > -- > 1.8.3.1 >
On 11/28/14 11:38, Andrew Jones wrote: > On Fri, Nov 28, 2014 at 12:18:27AM +0100, Laszlo Ersek wrote: >> fw_cfg already supports exposure over MMIO (used in ppc/mac_newworld.c, >> ppc/mac_oldworld.c, sparc/sun4m.c); we can easily add it to the "virt" >> board. >> >> The mmio register block of fw_cfg is advertized in the device tree. As >> base address we pick 0x09020000, which conforms to the comment preceding >> "a15memmap": it falls in the miscellaneous device I/O range 128MB..256MB, >> and it is aligned at 64KB. >> >> fw_cfg automatically exports a number of files to the guest; for example, >> "bootorder" (see fw_cfg_machine_reset()). >> >> Signed-off-by: Laszlo Ersek <lersek@redhat.com> >> --- >> hw/arm/virt.c | 21 +++++++++++++++++++++ >> 1 file changed, 21 insertions(+) >> >> diff --git a/hw/arm/virt.c b/hw/arm/virt.c >> index 314e55b..070bd34 100644 >> --- a/hw/arm/virt.c >> +++ b/hw/arm/virt.c >> @@ -68,6 +68,7 @@ enum { >> VIRT_UART, >> VIRT_MMIO, >> VIRT_RTC, >> + VIRT_FW_CFG, >> }; >> >> typedef struct MemMapEntry { >> @@ -107,6 +108,7 @@ static const MemMapEntry a15memmap[] = { >> [VIRT_GIC_CPU] = { 0x08010000, 0x00010000 }, >> [VIRT_UART] = { 0x09000000, 0x00001000 }, >> [VIRT_RTC] = { 0x09010000, 0x00001000 }, >> + [VIRT_FW_CFG] = { 0x09020000, FW_CFG_SIZE + FW_CFG_DATA_SIZE }, >> [VIRT_MMIO] = { 0x0a000000, 0x00000200 }, >> /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */ >> /* 0x10000000 .. 0x40000000 reserved for PCI */ >> @@ -519,6 +521,23 @@ static void create_flash(const VirtBoardInfo *vbi) >> g_free(nodename); >> } >> >> +static void create_fw_cfg(const VirtBoardInfo *vbi) >> +{ >> + hwaddr base = vbi->memmap[VIRT_FW_CFG].base; >> + char *nodename; >> + >> + fw_cfg_init(0, 0, base, base + FW_CFG_SIZE); >> + >> + nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); >> + qemu_fdt_add_subnode(vbi->fdt, nodename); >> + qemu_fdt_setprop_string(vbi->fdt, nodename, >> + "compatible", "fw-cfg,mmio"); >> + qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg", >> + 2, base, 2, FW_CFG_SIZE, >> + 2, base + FW_CFG_SIZE, 2, FW_CFG_DATA_SIZE); > > Overkill suggestion alert, but how about defining something like > > #define FW_CFG_SIZE_ALIGNED \ > MIN(QEMU_ALIGN_UP(FW_CFG_SIZE, FW_CFG_DATA_SIZE), \ > QEMU_ALIGN_UP(FW_CFG_SIZE, 4)) > > and then using that in your memmap size calculation and fw-cfg-data base > address calculation. The only reason I suggest this is because it's hard > to tell that fw-cfg-data's address will be naturally aligned without > hunting down the definition of FW_CFG_DATA_SIZE. And, if it were to change > (which it probably never will), then it may not be. Why does it need to be aligned? The selector register is aligned at a 64KB boundary (for independent, strict reasons). The data register is not aligned at all, and -- AFAICS -- it need not be, because it's 1 byte wide. (In fact the ARM-specific Mmio(Read|Write)XX functions in edk2 enforce natural alignment, and the above layout passes without problems.) The full register block is 3 bytes wide. Is that a problem? Thanks Laszlo > >> + g_free(nodename); >> +} >> + >> static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size) >> { >> const VirtBoardInfo *board = (const VirtBoardInfo *)binfo; >> @@ -604,6 +623,8 @@ static void machvirt_init(MachineState *machine) >> */ >> create_virtio_devices(vbi, pic); >> >> + create_fw_cfg(vbi); >> + >> vbi->bootinfo.ram_size = machine->ram_size; >> vbi->bootinfo.kernel_filename = machine->kernel_filename; >> vbi->bootinfo.kernel_cmdline = machine->kernel_cmdline; >> -- >> 1.8.3.1 >>
On 11/28/14 11:43, Laszlo Ersek wrote: > On 11/28/14 11:38, Andrew Jones wrote: >> On Fri, Nov 28, 2014 at 12:18:27AM +0100, Laszlo Ersek wrote: >>> fw_cfg already supports exposure over MMIO (used in ppc/mac_newworld.c, >>> ppc/mac_oldworld.c, sparc/sun4m.c); we can easily add it to the "virt" >>> board. >>> >>> The mmio register block of fw_cfg is advertized in the device tree. As >>> base address we pick 0x09020000, which conforms to the comment preceding >>> "a15memmap": it falls in the miscellaneous device I/O range 128MB..256MB, >>> and it is aligned at 64KB. >>> >>> fw_cfg automatically exports a number of files to the guest; for example, >>> "bootorder" (see fw_cfg_machine_reset()). >>> >>> Signed-off-by: Laszlo Ersek <lersek@redhat.com> >>> --- >>> hw/arm/virt.c | 21 +++++++++++++++++++++ >>> 1 file changed, 21 insertions(+) >>> >>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c >>> index 314e55b..070bd34 100644 >>> --- a/hw/arm/virt.c >>> +++ b/hw/arm/virt.c >>> @@ -68,6 +68,7 @@ enum { >>> VIRT_UART, >>> VIRT_MMIO, >>> VIRT_RTC, >>> + VIRT_FW_CFG, >>> }; >>> >>> typedef struct MemMapEntry { >>> @@ -107,6 +108,7 @@ static const MemMapEntry a15memmap[] = { >>> [VIRT_GIC_CPU] = { 0x08010000, 0x00010000 }, >>> [VIRT_UART] = { 0x09000000, 0x00001000 }, >>> [VIRT_RTC] = { 0x09010000, 0x00001000 }, >>> + [VIRT_FW_CFG] = { 0x09020000, FW_CFG_SIZE + FW_CFG_DATA_SIZE }, >>> [VIRT_MMIO] = { 0x0a000000, 0x00000200 }, >>> /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */ >>> /* 0x10000000 .. 0x40000000 reserved for PCI */ >>> @@ -519,6 +521,23 @@ static void create_flash(const VirtBoardInfo *vbi) >>> g_free(nodename); >>> } >>> >>> +static void create_fw_cfg(const VirtBoardInfo *vbi) >>> +{ >>> + hwaddr base = vbi->memmap[VIRT_FW_CFG].base; >>> + char *nodename; >>> + >>> + fw_cfg_init(0, 0, base, base + FW_CFG_SIZE); >>> + >>> + nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); >>> + qemu_fdt_add_subnode(vbi->fdt, nodename); >>> + qemu_fdt_setprop_string(vbi->fdt, nodename, >>> + "compatible", "fw-cfg,mmio"); >>> + qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg", >>> + 2, base, 2, FW_CFG_SIZE, >>> + 2, base + FW_CFG_SIZE, 2, FW_CFG_DATA_SIZE); >> >> Overkill suggestion alert, but how about defining something like >> >> #define FW_CFG_SIZE_ALIGNED \ >> MIN(QEMU_ALIGN_UP(FW_CFG_SIZE, FW_CFG_DATA_SIZE), \ >> QEMU_ALIGN_UP(FW_CFG_SIZE, 4)) >> >> and then using that in your memmap size calculation and fw-cfg-data base >> address calculation. The only reason I suggest this is because it's hard >> to tell that fw-cfg-data's address will be naturally aligned without >> hunting down the definition of FW_CFG_DATA_SIZE. And, if it were to change >> (which it probably never will), then it may not be. > > Why does it need to be aligned? > > The selector register is aligned at a 64KB boundary (for independent, > strict reasons). > > The data register is not aligned at all, and -- AFAICS -- it need not > be, because it's 1 byte wide. (In fact the ARM-specific > Mmio(Read|Write)XX functions in edk2 enforce natural alignment, and the > above layout passes without problems.) > > The full register block is 3 bytes wide. Is that a problem? Hm, I think I get it now. If FW_CFG_DATA_SIZE were to increase, then its alignment would have to increase as well, and whatever alignment FW_CFG_SIZE provides might not suffice. So, you'd calculate the natural alignment, but wouldn't increase it beyond 4. I do think this is a bit overkill :) but I can do it. Let's wait for more review comments first. Thanks! Laszlo
On Fri, Nov 28, 2014 at 11:43:32AM +0100, Laszlo Ersek wrote: > On 11/28/14 11:38, Andrew Jones wrote: > > On Fri, Nov 28, 2014 at 12:18:27AM +0100, Laszlo Ersek wrote: > >> fw_cfg already supports exposure over MMIO (used in ppc/mac_newworld.c, > >> ppc/mac_oldworld.c, sparc/sun4m.c); we can easily add it to the "virt" > >> board. > >> > >> The mmio register block of fw_cfg is advertized in the device tree. As > >> base address we pick 0x09020000, which conforms to the comment preceding > >> "a15memmap": it falls in the miscellaneous device I/O range 128MB..256MB, > >> and it is aligned at 64KB. > >> > >> fw_cfg automatically exports a number of files to the guest; for example, > >> "bootorder" (see fw_cfg_machine_reset()). > >> > >> Signed-off-by: Laszlo Ersek <lersek@redhat.com> > >> --- > >> hw/arm/virt.c | 21 +++++++++++++++++++++ > >> 1 file changed, 21 insertions(+) > >> > >> diff --git a/hw/arm/virt.c b/hw/arm/virt.c > >> index 314e55b..070bd34 100644 > >> --- a/hw/arm/virt.c > >> +++ b/hw/arm/virt.c > >> @@ -68,6 +68,7 @@ enum { > >> VIRT_UART, > >> VIRT_MMIO, > >> VIRT_RTC, > >> + VIRT_FW_CFG, > >> }; > >> > >> typedef struct MemMapEntry { > >> @@ -107,6 +108,7 @@ static const MemMapEntry a15memmap[] = { > >> [VIRT_GIC_CPU] = { 0x08010000, 0x00010000 }, > >> [VIRT_UART] = { 0x09000000, 0x00001000 }, > >> [VIRT_RTC] = { 0x09010000, 0x00001000 }, > >> + [VIRT_FW_CFG] = { 0x09020000, FW_CFG_SIZE + FW_CFG_DATA_SIZE }, > >> [VIRT_MMIO] = { 0x0a000000, 0x00000200 }, > >> /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */ > >> /* 0x10000000 .. 0x40000000 reserved for PCI */ > >> @@ -519,6 +521,23 @@ static void create_flash(const VirtBoardInfo *vbi) > >> g_free(nodename); > >> } > >> > >> +static void create_fw_cfg(const VirtBoardInfo *vbi) > >> +{ > >> + hwaddr base = vbi->memmap[VIRT_FW_CFG].base; > >> + char *nodename; > >> + > >> + fw_cfg_init(0, 0, base, base + FW_CFG_SIZE); > >> + > >> + nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); > >> + qemu_fdt_add_subnode(vbi->fdt, nodename); > >> + qemu_fdt_setprop_string(vbi->fdt, nodename, > >> + "compatible", "fw-cfg,mmio"); > >> + qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg", > >> + 2, base, 2, FW_CFG_SIZE, > >> + 2, base + FW_CFG_SIZE, 2, FW_CFG_DATA_SIZE); > > > > Overkill suggestion alert, but how about defining something like > > > > #define FW_CFG_SIZE_ALIGNED \ > > MIN(QEMU_ALIGN_UP(FW_CFG_SIZE, FW_CFG_DATA_SIZE), \ > > QEMU_ALIGN_UP(FW_CFG_SIZE, 4)) > > > > and then using that in your memmap size calculation and fw-cfg-data base > > address calculation. The only reason I suggest this is because it's hard > > to tell that fw-cfg-data's address will be naturally aligned without > > hunting down the definition of FW_CFG_DATA_SIZE. And, if it were to change > > (which it probably never will), then it may not be. > > Why does it need to be aligned? Natural alignment is more efficient. > > The selector register is aligned at a 64KB boundary (for independent, > strict reasons). > > The data register is not aligned at all, and -- AFAICS -- it need not > be, because it's 1 byte wide. (In fact the ARM-specific > Mmio(Read|Write)XX functions in edk2 enforce natural alignment, and the > above layout passes without problems.) Right. As FW_CFG_DATA_SIZE is currently 1 byte, it's already naturally aligned, and the macro definition I have above actually doesn't change anything (which is why I gave the overkill alert). However if FW_CFG_DATA_SIZE was to change, then the natural alignment could be lost. > > The full register block is 3 bytes wide. Is that a problem? No, it's fine as is, and the FW_CFG_SIZE_ALIGNED would leave it 3 bytes wide too. FW_CFG_SIZE_ALIGNED only adds future-proofing. However it really is overkill as the chance that FW_CFG_DATA_SIZE will change is nil. > > Thanks > Laszlo > > > > >> + g_free(nodename); > >> +} > >> + > >> static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size) > >> { > >> const VirtBoardInfo *board = (const VirtBoardInfo *)binfo; > >> @@ -604,6 +623,8 @@ static void machvirt_init(MachineState *machine) > >> */ > >> create_virtio_devices(vbi, pic); > >> > >> + create_fw_cfg(vbi); > >> + > >> vbi->bootinfo.ram_size = machine->ram_size; > >> vbi->bootinfo.kernel_filename = machine->kernel_filename; > >> vbi->bootinfo.kernel_cmdline = machine->kernel_cmdline; > >> -- > >> 1.8.3.1 > >> >
On Fri, Nov 28, 2014 at 11:49:48AM +0100, Laszlo Ersek wrote: > On 11/28/14 11:43, Laszlo Ersek wrote: > > On 11/28/14 11:38, Andrew Jones wrote: > >> On Fri, Nov 28, 2014 at 12:18:27AM +0100, Laszlo Ersek wrote: > >>> fw_cfg already supports exposure over MMIO (used in ppc/mac_newworld.c, > >>> ppc/mac_oldworld.c, sparc/sun4m.c); we can easily add it to the "virt" > >>> board. > >>> > >>> The mmio register block of fw_cfg is advertized in the device tree. As > >>> base address we pick 0x09020000, which conforms to the comment preceding > >>> "a15memmap": it falls in the miscellaneous device I/O range 128MB..256MB, > >>> and it is aligned at 64KB. > >>> > >>> fw_cfg automatically exports a number of files to the guest; for example, > >>> "bootorder" (see fw_cfg_machine_reset()). > >>> > >>> Signed-off-by: Laszlo Ersek <lersek@redhat.com> > >>> --- > >>> hw/arm/virt.c | 21 +++++++++++++++++++++ > >>> 1 file changed, 21 insertions(+) > >>> > >>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c > >>> index 314e55b..070bd34 100644 > >>> --- a/hw/arm/virt.c > >>> +++ b/hw/arm/virt.c > >>> @@ -68,6 +68,7 @@ enum { > >>> VIRT_UART, > >>> VIRT_MMIO, > >>> VIRT_RTC, > >>> + VIRT_FW_CFG, > >>> }; > >>> > >>> typedef struct MemMapEntry { > >>> @@ -107,6 +108,7 @@ static const MemMapEntry a15memmap[] = { > >>> [VIRT_GIC_CPU] = { 0x08010000, 0x00010000 }, > >>> [VIRT_UART] = { 0x09000000, 0x00001000 }, > >>> [VIRT_RTC] = { 0x09010000, 0x00001000 }, > >>> + [VIRT_FW_CFG] = { 0x09020000, FW_CFG_SIZE + FW_CFG_DATA_SIZE }, > >>> [VIRT_MMIO] = { 0x0a000000, 0x00000200 }, > >>> /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */ > >>> /* 0x10000000 .. 0x40000000 reserved for PCI */ > >>> @@ -519,6 +521,23 @@ static void create_flash(const VirtBoardInfo *vbi) > >>> g_free(nodename); > >>> } > >>> > >>> +static void create_fw_cfg(const VirtBoardInfo *vbi) > >>> +{ > >>> + hwaddr base = vbi->memmap[VIRT_FW_CFG].base; > >>> + char *nodename; > >>> + > >>> + fw_cfg_init(0, 0, base, base + FW_CFG_SIZE); > >>> + > >>> + nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); > >>> + qemu_fdt_add_subnode(vbi->fdt, nodename); > >>> + qemu_fdt_setprop_string(vbi->fdt, nodename, > >>> + "compatible", "fw-cfg,mmio"); > >>> + qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg", > >>> + 2, base, 2, FW_CFG_SIZE, > >>> + 2, base + FW_CFG_SIZE, 2, FW_CFG_DATA_SIZE); > >> > >> Overkill suggestion alert, but how about defining something like > >> > >> #define FW_CFG_SIZE_ALIGNED \ > >> MIN(QEMU_ALIGN_UP(FW_CFG_SIZE, FW_CFG_DATA_SIZE), \ > >> QEMU_ALIGN_UP(FW_CFG_SIZE, 4)) > >> > >> and then using that in your memmap size calculation and fw-cfg-data base > >> address calculation. The only reason I suggest this is because it's hard > >> to tell that fw-cfg-data's address will be naturally aligned without > >> hunting down the definition of FW_CFG_DATA_SIZE. And, if it were to change > >> (which it probably never will), then it may not be. > > > > Why does it need to be aligned? > > > > The selector register is aligned at a 64KB boundary (for independent, > > strict reasons). > > > > The data register is not aligned at all, and -- AFAICS -- it need not > > be, because it's 1 byte wide. (In fact the ARM-specific > > Mmio(Read|Write)XX functions in edk2 enforce natural alignment, and the > > above layout passes without problems.) > > > > The full register block is 3 bytes wide. Is that a problem? > > Hm, I think I get it now. If FW_CFG_DATA_SIZE were to increase, then its > alignment would have to increase as well, and whatever alignment > FW_CFG_SIZE provides might not suffice. So, you'd calculate the natural > alignment, but wouldn't increase it beyond 4. > > I do think this is a bit overkill :) but I can do it. Let's wait for > more review comments first. Actually, on second thought, completely scratch my overkill suggestion. It's actually wrong to be concerned with it anyway. FW_CFG_DATA_SIZE doesn't dictate how we should access the data port, the fw-cfg protocol does, and that says we should access exactly one byte. So, regardless of the fw-cfg-data size, we'll never have to worry about the data port's alignment, as we'll never access more than one byte from it. > > Thanks! > Laszlo
diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 314e55b..070bd34 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -68,6 +68,7 @@ enum { VIRT_UART, VIRT_MMIO, VIRT_RTC, + VIRT_FW_CFG, }; typedef struct MemMapEntry { @@ -107,6 +108,7 @@ static const MemMapEntry a15memmap[] = { [VIRT_GIC_CPU] = { 0x08010000, 0x00010000 }, [VIRT_UART] = { 0x09000000, 0x00001000 }, [VIRT_RTC] = { 0x09010000, 0x00001000 }, + [VIRT_FW_CFG] = { 0x09020000, FW_CFG_SIZE + FW_CFG_DATA_SIZE }, [VIRT_MMIO] = { 0x0a000000, 0x00000200 }, /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */ /* 0x10000000 .. 0x40000000 reserved for PCI */ @@ -519,6 +521,23 @@ static void create_flash(const VirtBoardInfo *vbi) g_free(nodename); } +static void create_fw_cfg(const VirtBoardInfo *vbi) +{ + hwaddr base = vbi->memmap[VIRT_FW_CFG].base; + char *nodename; + + fw_cfg_init(0, 0, base, base + FW_CFG_SIZE); + + nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); + qemu_fdt_add_subnode(vbi->fdt, nodename); + qemu_fdt_setprop_string(vbi->fdt, nodename, + "compatible", "fw-cfg,mmio"); + qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg", + 2, base, 2, FW_CFG_SIZE, + 2, base + FW_CFG_SIZE, 2, FW_CFG_DATA_SIZE); + g_free(nodename); +} + static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size) { const VirtBoardInfo *board = (const VirtBoardInfo *)binfo; @@ -604,6 +623,8 @@ static void machvirt_init(MachineState *machine) */ create_virtio_devices(vbi, pic); + create_fw_cfg(vbi); + vbi->bootinfo.ram_size = machine->ram_size; vbi->bootinfo.kernel_filename = machine->kernel_filename; vbi->bootinfo.kernel_cmdline = machine->kernel_cmdline;
fw_cfg already supports exposure over MMIO (used in ppc/mac_newworld.c, ppc/mac_oldworld.c, sparc/sun4m.c); we can easily add it to the "virt" board. The mmio register block of fw_cfg is advertized in the device tree. As base address we pick 0x09020000, which conforms to the comment preceding "a15memmap": it falls in the miscellaneous device I/O range 128MB..256MB, and it is aligned at 64KB. fw_cfg automatically exports a number of files to the guest; for example, "bootorder" (see fw_cfg_machine_reset()). Signed-off-by: Laszlo Ersek <lersek@redhat.com> --- hw/arm/virt.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)