From patchwork Mon Nov 3 20:01:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Musta X-Patchwork-Id: 406346 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id AC7391400A0 for ; Tue, 4 Nov 2014 07:03:08 +1100 (AEDT) Received: from localhost ([::1]:37091 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XlNqE-00071V-QF for incoming@patchwork.ozlabs.org; Mon, 03 Nov 2014 15:03:06 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44882) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XlNpM-0005f4-5n for qemu-devel@nongnu.org; Mon, 03 Nov 2014 15:02:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XlNpD-00026E-12 for qemu-devel@nongnu.org; Mon, 03 Nov 2014 15:02:12 -0500 Received: from mail-ig0-x22f.google.com ([2607:f8b0:4001:c05::22f]:58749) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XlNpC-000265-Rn; Mon, 03 Nov 2014 15:02:02 -0500 Received: by mail-ig0-f175.google.com with SMTP id h3so5380014igd.8 for ; Mon, 03 Nov 2014 12:02:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/s5PCqNKEf0TcLBFAZkxAO+6BpFysEJ1Hsd2y8iYyaU=; b=nYkxgE3Kfsaw11dnuVLk7zC5a4w8CCOaXDMLiYQvm8l6jP3IAT7aP9qgp+j3ZK9Br+ SW6PQFbk/i21ZthSOrZXs/3hYXU33+u4zx0AReikzCQBLVG+M+3aXWa36xvAvrsWcM/A Shc0UvAlKW96hG7vxWApCGK8kJrgk5YUoUgx0LMIjFk6et1uBsh3A7pUGL1UzB7nDZqD JDbewwqpUdScqHn/+jGJ/fAPMX/ng4apbdLTMvJACczEXS8UKK7vvy59PSfRmL/SMcZu 1s7HqYIvo2KClZKwcYm1i0YNJt0lrYTjz9lLkNyuaC/BLIutc/RGnvqDWQG3qPpvR1BN AWFw== X-Received: by 10.107.19.35 with SMTP id b35mr50627332ioj.48.1415044922163; Mon, 03 Nov 2014 12:02:02 -0800 (PST) Received: from tmusta-sc.rchland.ibm.com (rchp4.rochester.ibm.com. [129.42.161.36]) by mx.google.com with ESMTPSA id u65sm6165090ioe.14.2014.11.03.12.02.01 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 03 Nov 2014 12:02:01 -0800 (PST) From: Tom Musta To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Date: Mon, 3 Nov 2014 14:01:11 -0600 Message-Id: <1415044877-17300-2-git-send-email-tommusta@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1415044877-17300-1-git-send-email-tommusta@gmail.com> References: <1415044877-17300-1-git-send-email-tommusta@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4001:c05::22f Cc: pbonzini@redhat.com, agraf@suse.de, Tom Musta Subject: [Qemu-devel] [PATCH 1/7] target-ppc: VXSQRT Should Not Be Set for NaNs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The Power ISA square root instructions (fsqrt[s], frsqrte[s]) must set the FPSCR[VXSQRT] flag when operating on a negative value. However, NaNs have no sign and therefore this flag should not be set when operating on one. Change the order of the checks in the helper code. Move the SNaN-to-QNaN macro to the top of the file so that it can be re-used. Signed-off-by: Tom Musta --- target-ppc/fpu_helper.c | 29 +++++++++++++++++------------ 1 files changed, 17 insertions(+), 12 deletions(-) diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c index da93d12..288401d 100644 --- a/target-ppc/fpu_helper.c +++ b/target-ppc/fpu_helper.c @@ -19,6 +19,9 @@ #include "cpu.h" #include "exec/helper-proto.h" +#define float64_snan_to_qnan(x) ((x) | 0x0008000000000000ULL) +#define float32_snan_to_qnan(x) ((x) | 0x00400000) + /*****************************************************************************/ /* Floating point operations helpers */ uint64_t helper_float32_to_float64(CPUPPCState *env, uint32_t arg) @@ -926,14 +929,16 @@ uint64_t helper_fsqrt(CPUPPCState *env, uint64_t arg) farg.ll = arg; - if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) { - /* Square root of a negative nonzero number */ - farg.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); - } else { + if (unlikely(float64_is_any_nan(farg.d))) { if (unlikely(float64_is_signaling_nan(farg.d))) { - /* sNaN square root */ + /* sNaN reciprocal square root */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + farg.ll = float64_snan_to_qnan(farg.ll); } + } else if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) { + /* Square root of a negative nonzero number */ + farg.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); + } else { farg.d = float64_sqrt(farg.d, &env->fp_status); } return farg.ll; @@ -980,17 +985,20 @@ uint64_t helper_frsqrte(CPUPPCState *env, uint64_t arg) farg.ll = arg; - if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) { - /* Reciprocal square root of a negative nonzero number */ - farg.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); - } else { + if (unlikely(float64_is_any_nan(farg.d))) { if (unlikely(float64_is_signaling_nan(farg.d))) { /* sNaN reciprocal square root */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + farg.ll = float64_snan_to_qnan(farg.ll); } + } else if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) { + /* Reciprocal square root of a negative nonzero number */ + farg.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); + } else { farg.d = float64_sqrt(farg.d, &env->fp_status); farg.d = float64_div(float64_one, farg.d, &env->fp_status); } + return farg.ll; } @@ -2388,9 +2396,6 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ VSX_SCALAR_CMP(xscmpodp, 1) VSX_SCALAR_CMP(xscmpudp, 0) -#define float64_snan_to_qnan(x) ((x) | 0x0008000000000000ULL) -#define float32_snan_to_qnan(x) ((x) | 0x00400000) - /* VSX_MAX_MIN - VSX floating point maximum/minimum * name - instruction mnemonic * op - operation (max or min)