diff mbox

[v5,01/33] target-arm: increase arrays of registers R13 & R14

Message ID 1412113785-21525-2-git-send-email-greg.bellows@linaro.org
State New
Headers show

Commit Message

Greg Bellows Sept. 30, 2014, 9:49 p.m. UTC
From: Fabian Aggeler <aggelerf@ethz.ch>

Increasing banked_r13 and banked_r14 to store LR_mon and SP_mon (bank
index 7).

Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
---
 target-arm/cpu.h     | 4 ++--
 target-arm/machine.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

Comments

Peter Maydell Oct. 6, 2014, 2:48 p.m. UTC | #1
On 30 September 2014 22:49, Greg Bellows <greg.bellows@linaro.org> wrote:
> From: Fabian Aggeler <aggelerf@ethz.ch>
>
> Increasing banked_r13 and banked_r14 to store LR_mon and SP_mon (bank
> index 7).
>
> Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
> ---
>  target-arm/cpu.h     | 4 ++--
>  target-arm/machine.c | 4 ++--
>  2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 65a3417..81fffd2 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -153,8 +153,8 @@ typedef struct CPUARMState {
>
>      /* Banked registers.  */
>      uint64_t banked_spsr[8];
> -    uint32_t banked_r13[6];
> -    uint32_t banked_r14[6];
> +    uint32_t banked_r13[8];
> +    uint32_t banked_r14[8];
>
>      /* These hold r8-r12.  */
>      uint32_t usr_regs[5];
> diff --git a/target-arm/machine.c b/target-arm/machine.c
> index ddb7d05..7e69127 100644
> --- a/target-arm/machine.c
> +++ b/target-arm/machine.c
> @@ -238,8 +238,8 @@ const VMStateDescription vmstate_arm_cpu = {
>          },
>          VMSTATE_UINT32(env.spsr, ARMCPU),
>          VMSTATE_UINT64_ARRAY(env.banked_spsr, ARMCPU, 8),
> -        VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 6),
> -        VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 6),
> +        VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 8),
> +        VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 8),
>          VMSTATE_UINT32_ARRAY(env.usr_regs, ARMCPU, 5),
>          VMSTATE_UINT32_ARRAY(env.fiq_regs, ARMCPU, 5),
>          VMSTATE_UINT64_ARRAY(env.elr_el, ARMCPU, 4),

You need to bump the vmstate version fields if
you change fields like this.

thanks
-- PMM
Greg Bellows Oct. 6, 2014, 7:21 p.m. UTC | #2
Fixed in v6.

On 30 September 2014 16:49, Greg Bellows <greg.bellows@linaro.org> wrote:

> From: Fabian Aggeler <aggelerf@ethz.ch>
>
> Increasing banked_r13 and banked_r14 to store LR_mon and SP_mon (bank
> index 7).
>
> Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
> ---
>  target-arm/cpu.h     | 4 ++--
>  target-arm/machine.c | 4 ++--
>  2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 65a3417..81fffd2 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -153,8 +153,8 @@ typedef struct CPUARMState {
>
>      /* Banked registers.  */
>      uint64_t banked_spsr[8];
> -    uint32_t banked_r13[6];
> -    uint32_t banked_r14[6];
> +    uint32_t banked_r13[8];
> +    uint32_t banked_r14[8];
>
>      /* These hold r8-r12.  */
>      uint32_t usr_regs[5];
> diff --git a/target-arm/machine.c b/target-arm/machine.c
> index ddb7d05..7e69127 100644
> --- a/target-arm/machine.c
> +++ b/target-arm/machine.c
> @@ -238,8 +238,8 @@ const VMStateDescription vmstate_arm_cpu = {
>          },
>          VMSTATE_UINT32(env.spsr, ARMCPU),
>          VMSTATE_UINT64_ARRAY(env.banked_spsr, ARMCPU, 8),
> -        VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 6),
> -        VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 6),
> +        VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 8),
> +        VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 8),
>          VMSTATE_UINT32_ARRAY(env.usr_regs, ARMCPU, 5),
>          VMSTATE_UINT32_ARRAY(env.fiq_regs, ARMCPU, 5),
>          VMSTATE_UINT64_ARRAY(env.elr_el, ARMCPU, 4),
> --
> 1.8.3.2
>
>
diff mbox

Patch

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 65a3417..81fffd2 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -153,8 +153,8 @@  typedef struct CPUARMState {
 
     /* Banked registers.  */
     uint64_t banked_spsr[8];
-    uint32_t banked_r13[6];
-    uint32_t banked_r14[6];
+    uint32_t banked_r13[8];
+    uint32_t banked_r14[8];
 
     /* These hold r8-r12.  */
     uint32_t usr_regs[5];
diff --git a/target-arm/machine.c b/target-arm/machine.c
index ddb7d05..7e69127 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -238,8 +238,8 @@  const VMStateDescription vmstate_arm_cpu = {
         },
         VMSTATE_UINT32(env.spsr, ARMCPU),
         VMSTATE_UINT64_ARRAY(env.banked_spsr, ARMCPU, 8),
-        VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 6),
-        VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 6),
+        VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 8),
+        VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 8),
         VMSTATE_UINT32_ARRAY(env.usr_regs, ARMCPU, 5),
         VMSTATE_UINT32_ARRAY(env.fiq_regs, ARMCPU, 5),
         VMSTATE_UINT64_ARRAY(env.elr_el, ARMCPU, 4),