From patchwork Thu Sep 18 23:43:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Snow X-Patchwork-Id: 391044 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5F9B3140186 for ; Fri, 19 Sep 2014 09:49:24 +1000 (EST) Received: from localhost ([::1]:54732 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XUlRy-0006FC-BH for incoming@patchwork.ozlabs.org; Thu, 18 Sep 2014 19:49:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44798) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XUlNZ-0006AT-Lc for qemu-devel@nongnu.org; Thu, 18 Sep 2014 19:44:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XUlNI-0003ds-0Q for qemu-devel@nongnu.org; Thu, 18 Sep 2014 19:44:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:24598) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XUlNH-0003ct-OB for qemu-devel@nongnu.org; Thu, 18 Sep 2014 19:44:31 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s8INiQtH014498 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Thu, 18 Sep 2014 19:44:26 -0400 Received: from dhcp-17-12.bos.redhat.com (vpn-52-147.rdu2.redhat.com [10.10.52.147]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s8INhx1U001562; Thu, 18 Sep 2014 19:44:20 -0400 From: John Snow To: qemu-devel@nongnu.org Date: Thu, 18 Sep 2014 19:43:33 -0400 Message-Id: <1411083819-9284-10-git-send-email-jsnow@redhat.com> In-Reply-To: <1411083819-9284-1-git-send-email-jsnow@redhat.com> References: <1411083819-9284-1-git-send-email-jsnow@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: kwolf@redhat.com, mst@redhat.com, armbru@redhat.com, stefanha@redhat.com, pbonzini@redhat.com, John Snow Subject: [Qemu-devel] [PATCH 09/15] qtest/ahci: Add port_check_interrupts helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org A helper that compares a given port's current interrupts and checks them against a supplied list of expected interrupt bits, and throws an error if they do not match. The helper then resets the requested interrupts on this port, and asserts that the interrupt register is now empty. Signed-off-by: John Snow --- tests/ahci-test.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/tests/ahci-test.c b/tests/ahci-test.c index 4615681..315e6e9 100644 --- a/tests/ahci-test.c +++ b/tests/ahci-test.c @@ -1314,6 +1314,20 @@ static void port_check_error(AHCIState *ahci, uint8_t px) ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR); } +static void port_check_interrupts(AHCIState *ahci, uint8_t px, + uint32_t intr_mask) +{ + uint32_t reg; + + /* Check for expected interrupts */ + reg = PX_RREG(px, AHCI_PX_IS); + ASSERT_BIT_SET(reg, intr_mask); + + /* Clear expected interrupts and assert all interrupts now cleared. */ + PX_WREG(px, AHCI_PX_IS, intr_mask); + g_assert_cmphex(PX_RREG(px, AHCI_PX_IS), ==, 0); +} + /* Get the #cx'th command of port #px. */ static void get_command_header(AHCIState *ahci, uint8_t px, uint8_t cx, AHCICommand *cmd) @@ -1562,18 +1576,10 @@ static void ahci_test_identify(AHCIState *ahci) /* Issue Command #cx via PxCI */ issue_command(ahci, i, cx, 0); + /* Check registers for post-command consistency */ port_check_error(ahci, i); - - /* Check for expected interrupts */ - reg = PX_RREG(i, AHCI_PX_IS); - ASSERT_BIT_SET(reg, AHCI_PX_IS_DHRS); - ASSERT_BIT_SET(reg, AHCI_PX_IS_PSS); /* BUG: we expect AHCI_PX_IS_DPS to be set. */ - ASSERT_BIT_CLEAR(reg, AHCI_PX_IS_DPS); - - /* Clear expected interrupts and assert all interrupts now cleared. */ - PX_WREG(i, AHCI_PX_IS, AHCI_PX_IS_DHRS | AHCI_PX_IS_PSS | AHCI_PX_IS_DPS); - g_assert_cmphex(PX_RREG(i, AHCI_PX_IS), ==, 0); + port_check_interrupts(ahci, i, AHCI_PX_IS_DHRS | AHCI_PX_IS_PSS); /* Investigate the CMD, assert that we read 512 bytes */ get_command_header(ahci, i, cx, &cmd);