diff mbox

pcie: Fix incorrect write to device ctl2 register

Message ID 1408609864-16156-1-git-send-email-arei.gonglei@huawei.com
State New
Headers show

Commit Message

Gonglei (Arei) Aug. 21, 2014, 8:31 a.m. UTC 
From: Gonglei <arei.gonglei@huawei.com>

ARI Forwarding Enable bit locate
Device Control 2 Register (Offset 28h).
Maybe a typo.

Signed-off-by: Gonglei <arei.gonglei@huawei.com>
---
 hw/pci/pcie.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Paolo Bonzini Aug. 21, 2014, 8:58 a.m. UTC | #1 
Il 21/08/2014 10:31, arei.gonglei@huawei.com ha scritto:
> +++ b/hw/pci/pcie.c
> @@ -504,7 +504,7 @@ void pcie_cap_ari_init(PCIDevice *dev)
>      uint32_t pos = dev->exp.exp_cap;
>      pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_DEVCAP2,
>                                 PCI_EXP_DEVCAP2_ARI);
> -    pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_DEVCTL2,
> +    pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_DEVCTL2,
>                                 PCI_EXP_DEVCTL2_ARI);
>  }
>  

IIUC the code is correct, it means that the bit can be written in
devctl2.  You don't want to set it, the firmware or OS can do it if they
understand ARI.

Paolo
Gonglei (Arei) Aug. 21, 2014, 9:11 a.m. UTC | #2 
> -----Original Message-----
> From: Paolo Bonzini [mailto:paolo.bonzini@gmail.com] On Behalf Of Paolo
> Bonzini
> Sent: Thursday, August 21, 2014 4:59 PM
> To: Gonglei (Arei); qemu-devel@nongnu.org
> Cc: Huangweidong (C); marcel.a@redhat.com; mst@redhat.com;
> knut.omang@oracle.com
> Subject: Re: [PATCH] pcie: Fix incorrect write to device ctl2 register
> 
> Il 21/08/2014 10:31, arei.gonglei@huawei.com ha scritto:
> > +++ b/hw/pci/pcie.c
> > @@ -504,7 +504,7 @@ void pcie_cap_ari_init(PCIDevice *dev)
> >      uint32_t pos = dev->exp.exp_cap;
> >      pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_DEVCAP2,
> >                                 PCI_EXP_DEVCAP2_ARI);
> > -    pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_DEVCTL2,
> > +    pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_DEVCTL2,
> >                                 PCI_EXP_DEVCTL2_ARI);
> >  }
> >
> 
> IIUC the code is correct, it means that the bit can be written in
> devctl2.  You don't want to set it, the firmware or OS can do it if they
> understand ARI.
> 
> Paolo

Oh, yes. You are right. 

Forgot the noise pls, thanks! 

Best regards,
-Gonglei
diff mbox

Patch

diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index a123c01..3f4b319 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -504,7 +504,7 @@  void pcie_cap_ari_init(PCIDevice *dev)
     uint32_t pos = dev->exp.exp_cap;
     pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_DEVCAP2,
                                PCI_EXP_DEVCAP2_ARI);
-    pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_DEVCTL2,
+    pci_long_test_and_set_mask(dev->config + pos + PCI_EXP_DEVCTL2,
                                PCI_EXP_DEVCTL2_ARI);
 }