From patchwork Tue Aug 19 13:08:27 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gonglei (Arei)" X-Patchwork-Id: 381352 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B04FD140097 for ; Tue, 19 Aug 2014 23:10:01 +1000 (EST) Received: from localhost ([::1]:50807 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XJjAk-0001e5-Sm for incoming@patchwork.ozlabs.org; Tue, 19 Aug 2014 09:09:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35097) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XJjA8-0000gC-U1 for qemu-devel@nongnu.org; Tue, 19 Aug 2014 09:09:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XJjA4-0002zo-3R for qemu-devel@nongnu.org; Tue, 19 Aug 2014 09:09:20 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:46515) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XJjA3-0002yP-8n for qemu-devel@nongnu.org; Tue, 19 Aug 2014 09:09:16 -0400 Received: from 172.24.2.119 (EHLO szxeml460-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id BYJ44712; Tue, 19 Aug 2014 21:08:44 +0800 (CST) Received: from localhost (10.177.19.102) by szxeml460-hub.china.huawei.com (10.82.67.203) with Microsoft SMTP Server id 14.3.158.1; Tue, 19 Aug 2014 21:08:33 +0800 From: To: Date: Tue, 19 Aug 2014 21:08:27 +0800 Message-ID: <1408453707-9972-3-git-send-email-arei.gonglei@huawei.com> X-Mailer: git-send-email 1.7.3.1.msysgit.0 In-Reply-To: <1408453707-9972-1-git-send-email-arei.gonglei@huawei.com> References: <1408453707-9972-1-git-send-email-arei.gonglei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.19.102] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 119.145.14.65 Cc: peter.crosthwaite@xilinx.com, weidong.huang@huawei.com, mst@redhat.com, marcel.a@redhat.com, luonengjun@huawei.com, peter.huangpeng@huawei.com, armbru@redhat.com, Gonglei , imammedo@redhat.com, pbonzini@redhat.com, afaerber@suse.de Subject: [Qemu-devel] [PATCH 2/2] pci: add check for pcie root ports and downstream ports X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Gonglei Right now, ARI Forwarding dose not support in QEMU. According to PCIe spec section 7.3.1, only slot 0 with the device attached to logic bus representing the link from downstream ports and root ports. So, adding check about slot 0 for PCIe downstream ports and root ports, which avoid useless operation, both hotplug and coldplug. Signed-off-by: Gonglei --- hw/pci/pci.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 351d320..f2d267f 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -773,6 +773,42 @@ static int pci_init_multifunction(PCIBus *bus, PCIDevice *dev) return 0; } +static int pci_check_pcie_port(PCIBus *bus, PCIDevice *dev) +{ + Object *obj = OBJECT(bus); + + if (!strcmp(object_get_typename(obj), TYPE_PCIE_BUS)) { + DeviceState *parent = qbus_get_parent(BUS(obj)); + const char *name = object_get_typename(OBJECT(parent)); + + /* + * Root ports and downstream ports of switches are the hot + * pluggable ports in a PCI Express hierarchy. + * PCI Express supports chip-to-chip interconnect, a PCIe link can + * only connect one pci device/Switch/EndPoint or PCI-bridge. + * + * 7.3. Configuration Transaction Rules (PCI Express specification 3.0) + * 7.3.1. Device Number + * + * Downstream Ports that do not have ARI Forwarding enabled must + * associate only Device 0 with the device attached to the Logical Bus + * representing the Link from the Port. + * + * Right now, ARI Forwarding dose not support. So, only slot 0 is + * supported, regardless of hotplug or coldplug. + */ + if (!strcmp(name, "ioh3420") || !strcmp(name, "xio3130-downstream")) { + if (PCI_SLOT(dev->devfn) != 0) { + error_report("Unsupported PCI slot %d for %s ports, only " + "supported slot 0", PCI_SLOT(dev->devfn), name); + return -1; + } + } + } + + return 0; +} + static void pci_config_alloc(PCIDevice *pci_dev) { int config_size = pci_config_size(pci_dev); @@ -871,6 +907,11 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus, return NULL; } + if (pci_check_pcie_port(bus, pci_dev)) { + do_pci_unregister_device(pci_dev); + return NULL; + } + if (!config_read) config_read = pci_default_read_config; if (!config_write)