From patchwork Mon Aug 11 07:04:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Le Tan X-Patchwork-Id: 378892 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 34640140139 for ; Mon, 11 Aug 2014 17:08:44 +1000 (EST) Received: from localhost ([::1]:34128 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XGjik-0008WU-2x for incoming@patchwork.ozlabs.org; Mon, 11 Aug 2014 03:08:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55380) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XGjg2-0004CF-Hp for qemu-devel@nongnu.org; Mon, 11 Aug 2014 03:06:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XGjfr-00026s-9a for qemu-devel@nongnu.org; Mon, 11 Aug 2014 03:05:54 -0400 Received: from mail-pd0-x22a.google.com ([2607:f8b0:400e:c02::22a]:58689) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XGjfr-00026m-1x for qemu-devel@nongnu.org; Mon, 11 Aug 2014 03:05:43 -0400 Received: by mail-pd0-f170.google.com with SMTP id g10so10351503pdj.1 for ; Mon, 11 Aug 2014 00:05:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FIh0J0MDmUg+NZQCi8EpUQIQbDHpORb+3+CTJ2AG+88=; b=NeOFqGf+f/jFpfhksAoDYfynekZ3lQJOALvj17LP1Bv1c448BH/hng0JxobRewXF/w QC6VMKWCAW1+2v2Ce6786UDKtY3LVLy6Cx1XdbxncpVY/Aq0HtvYzbHEQNAkL0iv8Cr9 bJEIWwL42NheyyhQeNkJvDqflSgqLyts5GX0ashSJrrU0TYJYJdsU9asWPhJ/FXg9YeI v+79ZvX8CfdZPbVjFqy7uXrSPQk49GOuhN3cEy5mwGziUZir6BWFZ1jqLVqYvJZoOvHG pUNzw1tM415OwpUroPLZvwq+D4OtWxj4nSjCdiON2Zl5vwun/F4jrvnFk28abCDdkrQM Ktfw== X-Received: by 10.66.163.164 with SMTP id yj4mr40240212pab.91.1407740741951; Mon, 11 Aug 2014 00:05:41 -0700 (PDT) Received: from localhost.localdomain ([222.29.39.131]) by mx.google.com with ESMTPSA id k17sm16051545pdm.32.2014.08.11.00.05.38 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 11 Aug 2014 00:05:41 -0700 (PDT) From: Le Tan To: qemu-devel@nongnu.org Date: Mon, 11 Aug 2014 15:04:58 +0800 Message-Id: <1407740702-4086-2-git-send-email-tamlokveer@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1407740702-4086-1-git-send-email-tamlokveer@gmail.com> References: <1407740702-4086-1-git-send-email-tamlokveer@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c02::22a Cc: "Michael S. Tsirkin" , Stefan Weil , Knut Omang , Le Tan , Alex Williamson , Jan Kiszka , Anthony Liguori , Paolo Bonzini Subject: [Qemu-devel] [PATCH v3 1/5] iommu: add is_write as a parameter to the translate function of MemoryRegionIOMMUOps X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add a bool variable is_write as a parameter to the translate function of MemoryRegionIOMMUOps to indicate the operation of the access. It can be used for correct fault reporting from within the callback. Change the interface of related functions. Signed-off-by: Le Tan --- exec.c | 2 +- hw/alpha/typhoon.c | 3 ++- hw/pci-host/apb.c | 3 ++- hw/ppc/spapr_iommu.c | 3 ++- include/exec/memory.h | 2 +- 5 files changed, 8 insertions(+), 5 deletions(-) diff --git a/exec.c b/exec.c index 765bd94..5ccc106 100644 --- a/exec.c +++ b/exec.c @@ -373,7 +373,7 @@ MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, break; } - iotlb = mr->iommu_ops->translate(mr, addr); + iotlb = mr->iommu_ops->translate(mr, addr, is_write); addr = ((iotlb.translated_addr & ~iotlb.addr_mask) | (addr & iotlb.addr_mask)); len = MIN(len, (addr | iotlb.addr_mask) - addr + 1); diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 67a1070..31947d9 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -660,7 +660,8 @@ static bool window_translate(TyphoonWindow *win, hwaddr addr, /* Handle PCI-to-system address translation. */ /* TODO: A translation failure here ought to set PCI error codes on the Pchip and generate a machine check interrupt. */ -static IOMMUTLBEntry typhoon_translate_iommu(MemoryRegion *iommu, hwaddr addr) +static IOMMUTLBEntry typhoon_translate_iommu(MemoryRegion *iommu, hwaddr addr, + bool is_write) { TyphoonPchip *pchip = container_of(iommu, TyphoonPchip, iommu); IOMMUTLBEntry ret; diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c index d238a84..0e0e0ee 100644 --- a/hw/pci-host/apb.c +++ b/hw/pci-host/apb.c @@ -203,7 +203,8 @@ static AddressSpace *pbm_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn) return &is->iommu_as; } -static IOMMUTLBEntry pbm_translate_iommu(MemoryRegion *iommu, hwaddr addr) +static IOMMUTLBEntry pbm_translate_iommu(MemoryRegion *iommu, hwaddr addr, + bool is_write) { IOMMUState *is = container_of(iommu, IOMMUState, iommu); hwaddr baseaddr, offset; diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index f6e32a4..6c91d8e 100644 --- a/hw/ppc/spapr_iommu.c +++ b/hw/ppc/spapr_iommu.c @@ -59,7 +59,8 @@ static sPAPRTCETable *spapr_tce_find_by_liobn(uint32_t liobn) return NULL; } -static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr) +static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr, + bool is_write) { sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu); uint64_t tce; diff --git a/include/exec/memory.h b/include/exec/memory.h index e2c8e3e..834543d 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -129,7 +129,7 @@ typedef struct MemoryRegionIOMMUOps MemoryRegionIOMMUOps; struct MemoryRegionIOMMUOps { /* Return a TLB entry that contains a given address. */ - IOMMUTLBEntry (*translate)(MemoryRegion *iommu, hwaddr addr); + IOMMUTLBEntry (*translate)(MemoryRegion *iommu, hwaddr addr, bool is_write); }; typedef struct CoalescedMemoryRange CoalescedMemoryRange;