From patchwork Wed Aug 6 20:38:46 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michael Roth X-Patchwork-Id: 377587 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E870C140082 for ; Thu, 7 Aug 2014 07:09:26 +1000 (EST) Received: from localhost ([::1]:41204 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XF8Sa-0001Ne-Ub for incoming@patchwork.ozlabs.org; Wed, 06 Aug 2014 17:09:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37785) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XF82j-0007oY-Kk for qemu-devel@nongnu.org; Wed, 06 Aug 2014 16:42:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XF82b-00051q-Ra for qemu-devel@nongnu.org; Wed, 06 Aug 2014 16:42:41 -0400 Received: from e7.ny.us.ibm.com ([32.97.182.137]:33909) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XF82b-00050O-Jl for qemu-devel@nongnu.org; Wed, 06 Aug 2014 16:42:33 -0400 Received: from /spool/local by e7.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 6 Aug 2014 16:42:33 -0400 Received: from d01dlp03.pok.ibm.com (9.56.250.168) by e7.ny.us.ibm.com (192.168.1.107) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Wed, 6 Aug 2014 16:42:31 -0400 Received: from b01cxnp22036.gho.pok.ibm.com (b01cxnp22036.gho.pok.ibm.com [9.57.198.26]) by d01dlp03.pok.ibm.com (Postfix) with ESMTP id B72B8C90026; Wed, 6 Aug 2014 16:42:22 -0400 (EDT) Received: from d01av03.pok.ibm.com (d01av03.pok.ibm.com [9.56.224.217]) by b01cxnp22036.gho.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id s76KgTWn1966376; Wed, 6 Aug 2014 20:42:29 GMT Received: from d01av03.pok.ibm.com (localhost [127.0.0.1]) by d01av03.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id s76KgTBp027904; Wed, 6 Aug 2014 16:42:29 -0400 Received: from localhost ([9.80.101.111]) by d01av03.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id s76KgTT8027883; Wed, 6 Aug 2014 16:42:29 -0400 From: Michael Roth To: qemu-devel@nongnu.org Date: Wed, 6 Aug 2014 15:38:46 -0500 Message-Id: <1407357598-21541-37-git-send-email-mdroth@linux.vnet.ibm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1407357598-21541-1-git-send-email-mdroth@linux.vnet.ibm.com> References: <1407357598-21541-1-git-send-email-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 14080620-5806-0000-0000-00000028FED1 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 32.97.182.137 Cc: qemu-stable@nongnu.org Subject: [Qemu-devel] [PATCH 036/108] target-arm: Make vbar_write 64bit friendly on 32bit hosts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Reviewed-by: Alex Bennée Message-id: 1398926097-28097-2-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell (cherry picked from commit fed3ffb9f157f33bc9b2b1c3ef68e710ee6b7b4b) Signed-off-by: Michael Roth --- target-arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 55077ed..420a66d 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -632,7 +632,7 @@ static void vbar_write(CPUARMState *env, const ARMCPRegInfo *ri, * contexts. (ARMv8 would permit us to do no masking at all, but ARMv7 * requires the bottom five bits to be RAZ/WI because they're UNK/SBZP.) */ - env->cp15.c12_vbar = value & ~0x1Ful; + env->cp15.c12_vbar = value & ~0x1FULL; } static uint64_t ccsidr_read(CPUARMState *env, const ARMCPRegInfo *ri)