From patchwork Mon Aug 4 17:38:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bastian Koppelmann X-Patchwork-Id: 376375 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 7FB6F140092 for ; Tue, 5 Aug 2014 02:40:23 +1000 (EST) Received: from localhost ([::1]:53517 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XELJ7-0006YN-LN for incoming@patchwork.ozlabs.org; Mon, 04 Aug 2014 12:40:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60116) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XELEO-00072Y-JE for qemu-devel@nongnu.org; Mon, 04 Aug 2014 12:35:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XELEF-0002Hk-Ex for qemu-devel@nongnu.org; Mon, 04 Aug 2014 12:35:28 -0400 Received: from mail.uni-paderborn.de ([131.234.142.9]:19282) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XELEF-0002HJ-7q for qemu-devel@nongnu.org; Mon, 04 Aug 2014 12:35:19 -0400 From: Bastian Koppelmann To: qemu-devel@nongnu.org Date: Mon, 4 Aug 2014 18:38:49 +0100 Message-Id: <1407173932-969-13-git-send-email-kbastian@mail.uni-paderborn.de> X-Mailer: git-send-email 2.0.4 In-Reply-To: <1407173932-969-1-git-send-email-kbastian@mail.uni-paderborn.de> References: <1407173932-969-1-git-send-email-kbastian@mail.uni-paderborn.de> X-IMT-Spam-Score: 0.0 () X-PMX-Version: 6.1.1.2430161, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2014.8.4.162721 X-IMT-Authenticated-Sender: uid=kbastian,ou=People,o=upb,c=de X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 131.234.142.9 Cc: peter.maydell@linaro.org, rth@twiddle.net Subject: [Qemu-devel] [PATCH v3 12/15] target-tricore: Add instructions of SBR opcode format X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add instructions of SBR opcode format. Add gen_loop micro-op generator function. Signed-off-by: Bastian Koppelmann Reviewed-by: Richard Henderson --- target-tricore/translate.c | 66 +++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 65 insertions(+), 1 deletion(-) -- 2.0.4 diff --git a/target-tricore/translate.c b/target-tricore/translate.c index 6cbfe89..8dac707 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -362,6 +362,18 @@ static inline void gen_branch_condi(DisasContext *ctx, int cond, TCGv r1, tcg_temp_free(temp); } +static void gen_loop(DisasContext *ctx, int r1, int32_t offset) +{ + int l1; + l1 = gen_new_label(); + + tcg_gen_subi_tl(cpu_gpr_a[r1], cpu_gpr_a[r1], 1); + tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr_a[r1], -1, l1); + gen_goto_tb(ctx, 1, ctx->pc + offset); + gen_set_label(l1); + gen_goto_tb(ctx, 0, ctx->next_pc); +} + static void gen_compute_branch(DisasContext *ctx, uint32_t opc, int r1, int r2 , int32_t constant , int32_t offset) { @@ -402,8 +414,44 @@ static void gen_compute_branch(DisasContext *ctx, uint32_t opc, int r1, gen_branch_condi(ctx, TCG_COND_NE, temp, 0, offset); tcg_temp_free(temp); break; +/* SBR-format jumps */ + case OPC1_16_SBR_JEQ: + gen_branch_cond(ctx, TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[15], + offset); + break; + case OPC1_16_SBR_JNE: + gen_branch_cond(ctx, TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[15], + offset); + break; + case OPC1_16_SBR_JNZ: + gen_branch_condi(ctx, TCG_COND_NE, cpu_gpr_d[r1], 0, offset); + break; + case OPC1_16_SBR_JNZ_A: + gen_branch_condi(ctx, TCG_COND_NE, cpu_gpr_a[r1], 0, offset); + break; + case OPC1_16_SBR_JGEZ: + gen_branch_condi(ctx, TCG_COND_GE, cpu_gpr_d[r1], 0, offset); + break; + case OPC1_16_SBR_JGTZ: + gen_branch_condi(ctx, TCG_COND_GT, cpu_gpr_d[r1], 0, offset); + break; + case OPC1_16_SBR_JLEZ: + gen_branch_condi(ctx, TCG_COND_LE, cpu_gpr_d[r1], 0, offset); + break; + case OPC1_16_SBR_JLTZ: + gen_branch_condi(ctx, TCG_COND_LT, cpu_gpr_d[r1], 0, offset); + break; + case OPC1_16_SBR_JZ: + gen_branch_condi(ctx, TCG_COND_EQ, cpu_gpr_d[r1], 0, offset); + break; + case OPC1_16_SBR_JZ_A: + gen_branch_condi(ctx, TCG_COND_EQ, cpu_gpr_a[r1], 0, offset); + break; + case OPC1_16_SBR_LOOP: + gen_loop(ctx, r1, offset * 2 - 32); + break; default: - printf("Branch Error at %x\n", ctx->pc); + printf("Branch Error at %x\n", ctx->pc); } ctx->bstate = BS_BRANCH; } @@ -719,6 +767,22 @@ static void decode_16Bit_opc(CPUTRICOREState *env, DisasContext *ctx) const16 = MASK_OP_SBRN_N(ctx->opcode); gen_compute_branch(ctx, op1, 0, 0, const16, address); break; +/* SBR-format */ + case OPC1_16_SBR_JEQ: + case OPC1_16_SBR_JGEZ: + case OPC1_16_SBR_JGTZ: + case OPC1_16_SBR_JLEZ: + case OPC1_16_SBR_JLTZ: + case OPC1_16_SBR_JNE: + case OPC1_16_SBR_JNZ: + case OPC1_16_SBR_JNZ_A: + case OPC1_16_SBR_JZ: + case OPC1_16_SBR_JZ_A: + case OPC1_16_SBR_LOOP: + r1 = MASK_OP_SBR_S2(ctx->opcode); + address = MASK_OP_SBR_DISP4(ctx->opcode); + gen_compute_branch(ctx, op1, r1, 0, 0, address); + break; } }