| Message ID | 1402934602-29002-2-git-send-email-tommusta@gmail.com |
|---|---|
| State | New |
| Headers | show |
diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 127c565..9a32899 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -767,8 +767,9 @@ static uint32_t get_elf_hwcap(void) #define DLINFO_ARCH_ITEMS 5 #define ARCH_DLINFO \ do { \ - NEW_AUX_ENT(AT_DCACHEBSIZE, 0x20); \ - NEW_AUX_ENT(AT_ICACHEBSIZE, 0x20); \ + PowerPCCPU *cpu = POWERPC_CPU(thread_cpu); \ + NEW_AUX_ENT(AT_DCACHEBSIZE, cpu->env.dcache_line_size); \ + NEW_AUX_ENT(AT_ICACHEBSIZE, cpu->env.icache_line_size); \ NEW_AUX_ENT(AT_UCACHEBSIZE, 0); \ /* \ * Now handle glibc compatibility. \
Set the AT_ICACHEBSIZE and AT_DCACHEBSIZE entries of the AUXV to match the CPU model's cache line sizes. This fixes memory clobbering problems on more recent Book 3s implementations; memset(p, 0, N) will use the dcbz instruction when N is sufficiently large and many of the newer server CPUs have cache lines sizes of 128 bytes. Signed-off-by: Tom Musta <tommusta@gmail.com> --- linux-user/elfload.c | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-)