From patchwork Tue Jun 3 09:27:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Kardashevskiy X-Patchwork-Id: 355281 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id F339A14009E for ; Tue, 3 Jun 2014 19:44:19 +1000 (EST) Received: from localhost ([::1]:51474 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WrlGU-0008Nv-0u for incoming@patchwork.ozlabs.org; Tue, 03 Jun 2014 05:44:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56229) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wrl1Z-0008ED-4e for qemu-devel@nongnu.org; Tue, 03 Jun 2014 05:29:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wrl1D-0000gf-3k for qemu-devel@nongnu.org; Tue, 03 Jun 2014 05:28:53 -0400 Received: from e23smtp08.au.ibm.com ([202.81.31.141]:54000) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wrl1A-0000ax-B5 for qemu-devel@nongnu.org; Tue, 03 Jun 2014 05:28:31 -0400 Received: from /spool/local by e23smtp08.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 3 Jun 2014 19:28:22 +1000 Received: from d23dlp02.au.ibm.com (202.81.31.213) by e23smtp08.au.ibm.com (202.81.31.205) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Tue, 3 Jun 2014 19:28:19 +1000 Received: from d23relay03.au.ibm.com (d23relay03.au.ibm.com [9.190.235.21]) by d23dlp02.au.ibm.com (Postfix) with ESMTP id 3AED52BB0040; Tue, 3 Jun 2014 19:28:19 +1000 (EST) Received: from d23av02.au.ibm.com (d23av02.au.ibm.com [9.190.235.138]) by d23relay03.au.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id s539S38C11993506; Tue, 3 Jun 2014 19:28:03 +1000 Received: from d23av02.au.ibm.com (localhost [127.0.0.1]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id s539SInw005082; Tue, 3 Jun 2014 19:28:19 +1000 Received: from ozlabs.au.ibm.com (ozlabs.au.ibm.com [9.190.163.12]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id s539SIgj005077; Tue, 3 Jun 2014 19:28:18 +1000 Received: from bran.ozlabs.ibm.com (haven.au.ibm.com [9.190.164.82]) by ozlabs.au.ibm.com (Postfix) with ESMTP id 7F205A01E7; Tue, 3 Jun 2014 19:28:18 +1000 (EST) Received: from ka1.ozlabs.ibm.com (ka1.ozlabs.ibm.com [10.61.145.11]) by bran.ozlabs.ibm.com (Postfix) with ESMTP id BF36516AB67; Tue, 3 Jun 2014 19:28:17 +1000 (EST) From: Alexey Kardashevskiy To: qemu-devel@nongnu.org Date: Tue, 3 Jun 2014 19:27:57 +1000 Message-Id: <1401787684-31895-23-git-send-email-aik@ozlabs.ru> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1401787684-31895-1-git-send-email-aik@ozlabs.ru> References: <1401787684-31895-1-git-send-email-aik@ozlabs.ru> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 14060309-5140-0000-0000-0000053C05A4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 202.81.31.141 Cc: Alexey Kardashevskiy , Tom Musta , qemu-ppc@nongnu.org, Alexander Graf Subject: [Qemu-devel] [PATCH v4 22/29] target-ppc: Add POWER8's MMCR2/MMCRS SPRs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This adds POWER8 specific PMU MMCR2/MMCRS SPRs. This adds a spr_write_ureg helper for changing a hypv-privileged SPR when it is accessed via its user-privileged mirror. A spr_read_ureg() is already there. Since the new helper is only used by book3s CPUs, it is limited to TARGET_PPC64 to make gcc happy when QEMU is compiled for 32 bit. Signed-off-by: Alexey Kardashevskiy Reviewed-by: Tom Musta --- Changes: v4: * disabled write_ureg for user mode, privileged mode is still needed for recent guest kernels to boot on POWER8 --- target-ppc/cpu.h | 3 +++ target-ppc/translate_init.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 32fadcd..cf1ccad 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1480,6 +1480,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_MPC_MI_CTR (0x300) #define SPR_PERF1 (0x301) #define SPR_RCPU_MI_RBA1 (0x301) +#define SPR_POWER_UMMCR2 (0x301) #define SPR_PERF2 (0x302) #define SPR_RCPU_MI_RBA2 (0x302) #define SPR_MPC_MI_AP (0x302) @@ -1527,6 +1528,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_MPC_MD_TW (0x30F) #define SPR_UPERF0 (0x310) #define SPR_UPERF1 (0x311) +#define SPR_POWER_MMCR2 (0x311) #define SPR_UPERF2 (0x312) #define SPR_POWER_MMCRA (0X312) #define SPR_UPERF3 (0x313) @@ -1579,6 +1581,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_440_ITV3 (0x377) #define SPR_440_CCR1 (0x378) #define SPR_DCRIPR (0x37B) +#define SPR_POWER_MMCRS (0x37E) #define SPR_PPR (0x380) #define SPR_750_GQR0 (0x390) #define SPR_440_DNV0 (0x390) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 9b83d56..6bb0788 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -175,6 +175,13 @@ static void spr_read_ureg (void *opaque, int gprn, int sprn) gen_load_spr(cpu_gpr[gprn], sprn + 0x10); } +#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) +static void spr_write_ureg(void *opaque, int sprn, int gprn) +{ + gen_store_spr(sprn + 0x10, cpu_gpr[gprn]); +} +#endif + /* SPR common to all non-embedded PowerPC */ /* DECR */ #if !defined(CONFIG_USER_ONLY) @@ -7500,6 +7507,26 @@ static void gen_spr_970_pmu_user(CPUPPCState *env) 0x00000000); } +static void gen_spr_power8_pmu_hypv(CPUPPCState *env) +{ + spr_register_kvm(env, SPR_POWER_MMCR2, "MMCR2", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + KVM_REG_PPC_MMCR2, 0x00000000); + spr_register_kvm(env, SPR_POWER_MMCRS, "MMCRS", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + KVM_REG_PPC_MMCRS, 0x00000000); +} + +static void gen_spr_power8_pmu_user(CPUPPCState *env) +{ + spr_register(env, SPR_POWER_UMMCR2, "UMMCR2", + &spr_read_ureg, SPR_NOACCESS, + &spr_read_ureg, &spr_write_ureg, + 0x00000000); +} + static void gen_spr_power5p_ear(CPUPPCState *env) { /* External access control */ @@ -7656,6 +7683,8 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) if (version >= BOOK3S_CPU_POWER8) { gen_spr_power8_tce_address_control(env); gen_spr_power8_fscr(env); + gen_spr_power8_pmu_hypv(env); + gen_spr_power8_pmu_user(env); } #if !defined(CONFIG_USER_ONLY) switch (version) {