From patchwork Wed May 14 07:17:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 348637 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 752C5140076 for ; Wed, 14 May 2014 17:29:45 +1000 (EST) Received: from localhost ([::1]:49732 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WkTdH-0004Sx-Bi for incoming@patchwork.ozlabs.org; Wed, 14 May 2014 03:29:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59829) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WkTSK-0000hj-7q for qemu-devel@nongnu.org; Wed, 14 May 2014 03:18:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WkTSE-0006kR-8a for qemu-devel@nongnu.org; Wed, 14 May 2014 03:18:24 -0400 Received: from mail-pa0-x233.google.com ([2607:f8b0:400e:c03::233]:58361) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WkTSE-0006kM-2R for qemu-devel@nongnu.org; Wed, 14 May 2014 03:18:18 -0400 Received: by mail-pa0-f51.google.com with SMTP id kq14so1343676pab.10 for ; Wed, 14 May 2014 00:18:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=n9M/tca/Tl8XURvPcspvBnKEl093ilEaD4rEP4dlqyg=; b=Pngxmxqc5zFqBH2LEzXWPRANvt4GP0A6/aY9k1ZfakBcSoPyvdPK+rEBvfaV575LL6 apTAu1Dtc6xMkb24eUZDBi2soWsv1crG5krc6y0NdYSdRXJCK2oGyYEKS5qfMTwIloJt EJJnxT6F4t5cGP2CLffBaOgIv7gpB4WeIdbfypyXkZezycNSBaDLW5FzOdYhj2Agx7b+ dFjpjF7G9O2uGFXcIXvZwSPT2/061fBiRypjmFiPSEnTxbspwtGDTneuKPSWDF+D6o7G 5eZUwSSfKXq6QGcXPJkFvi0BUrCbhJGbsyv05pGuGaQO+CWkpYObhiNdAX9MOrR5w+VN WRVQ== X-Received: by 10.68.218.3 with SMTP id pc3mr2179449pbc.71.1400051897342; Wed, 14 May 2014 00:18:17 -0700 (PDT) Received: from anchor.twiddle.net (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPSA id bq4sm1760614pbb.60.2014.05.14.00.18.15 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 May 2014 00:18:16 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 14 May 2014 00:17:38 -0700 Message-Id: <1400051861-5848-22-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1400051861-5848-1-git-send-email-rth@twiddle.net> References: <1400051861-5848-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c03::233 Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 21/24] tcg-mips: Improve setcond eq/ne vs zeros X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The original code results in one too many insns per zero present in the input. And since comparing 64-bit numbers vs zero is common... Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.c | 40 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 36 insertions(+), 4 deletions(-) diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index 1429ec7..ccf262b 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -701,6 +701,40 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1, tcg_out_nop(s); } +static TCGReg tcg_out_reduce_eq2(TCGContext *s, TCGReg tmp0, TCGReg tmp1, + TCGReg al, TCGReg ah, + TCGReg bl, TCGReg bh) +{ + /* Merge highpart comparison into AH. */ + if (bh != 0) { + if (ah != 0) { + tcg_out_opc_reg(s, OPC_XOR, tmp0, ah, bh); + ah = tmp0; + } else { + ah = bh; + } + } + /* Merge lowpart comparison into AL. */ + if (bl != 0) { + if (al != 0) { + tcg_out_opc_reg(s, OPC_XOR, tmp1, al, bl); + al = tmp1; + } else { + al = bl; + } + } + /* Merge high and low part comparisons into AL. */ + if (ah != 0) { + if (al != 0) { + tcg_out_opc_reg(s, OPC_OR, tmp0, ah, al); + al = tmp0; + } else { + al = ah; + } + } + return al; +} + static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret, TCGReg al, TCGReg ah, TCGReg bl, TCGReg bh) { @@ -716,10 +750,8 @@ static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret, switch (cond) { case TCG_COND_EQ: case TCG_COND_NE: - tcg_out_setcond(s, cond, tmp0, ah, bh); - tcg_out_setcond(s, cond, ret, al, bl); - tcg_out_opc_reg(s, (cond == TCG_COND_EQ ? OPC_AND : OPC_OR), - ret, ret, tmp0); + tmp1 = tcg_out_reduce_eq2(s, tmp0, tmp1, al, ah, bl, bh); + tcg_out_setcond(s, cond, ret, tmp1, TCG_REG_ZERO); break; default: