From patchwork Fri Apr 25 14:09:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Hajnoczi X-Patchwork-Id: 342876 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 2D478140161 for ; Sat, 26 Apr 2014 00:27:41 +1000 (EST) Received: from localhost ([::1]:58243 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wdh6I-00064z-Oh for incoming@patchwork.ozlabs.org; Fri, 25 Apr 2014 10:27:38 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58029) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wdh5p-0005Jn-Ix for qemu-devel@nongnu.org; Fri, 25 Apr 2014 10:27:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wdh5k-0001bV-Gp for qemu-devel@nongnu.org; Fri, 25 Apr 2014 10:27:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:1143) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wdh5k-0001bR-9W for qemu-devel@nongnu.org; Fri, 25 Apr 2014 10:27:04 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s3PEAUcV008283 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 25 Apr 2014 10:10:34 -0400 Received: from localhost (ovpn-112-54.ams2.redhat.com [10.36.112.54]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s3PEA2dp014259; Fri, 25 Apr 2014 10:10:03 -0400 From: Stefan Hajnoczi To: Date: Fri, 25 Apr 2014 16:09:38 +0200 Message-Id: <1398434980-17149-5-git-send-email-stefanha@redhat.com> In-Reply-To: <1398434980-17149-1-git-send-email-stefanha@redhat.com> References: <1398434980-17149-1-git-send-email-stefanha@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: Peter Maydell , Peter Crosthwaite , Nathan Rossi , Stefan Hajnoczi Subject: [Qemu-devel] [PULL 4/6] net: xilinx_axienet.c: Add phy soft reset bit clearing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Nathan Rossi Clear the BMCR Reset when writing to registers. Signed-off-by: Nathan Rossi [ PC: * Trivial style fixes to commit message ] Signed-off-by: Peter Crosthwaite Reviewed-by: Beniamino Galvani Reviewed-by: Edgar E. Iglesias Signed-off-by: Stefan Hajnoczi --- hw/net/xilinx_axienet.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c index 839d97c..0f485a0 100644 --- a/hw/net/xilinx_axienet.c +++ b/hw/net/xilinx_axienet.c @@ -142,6 +142,9 @@ tdk_write(struct PHY *phy, unsigned int req, unsigned int data) phy->regs[regnum] = data; break; } + + /* Unconditionally clear regs[BMCR][BMCR_RESET] */ + phy->regs[0] &= ~0x8000; } static void