From patchwork Wed Apr 16 14:44:18 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hannes Reinecke X-Patchwork-Id: 339617 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 157401400AB for ; Thu, 17 Apr 2014 00:49:50 +1000 (EST) Received: from localhost ([::1]:54972 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WaR9o-0008Kb-28 for incoming@patchwork.ozlabs.org; Wed, 16 Apr 2014 10:49:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47392) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WaR4t-0001AE-Gm for qemu-devel@nongnu.org; Wed, 16 Apr 2014 10:44:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WaR4n-0004x0-EK for qemu-devel@nongnu.org; Wed, 16 Apr 2014 10:44:43 -0400 Received: from cantor2.suse.de ([195.135.220.15]:39621 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WaR4n-0004wq-4E for qemu-devel@nongnu.org; Wed, 16 Apr 2014 10:44:37 -0400 Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 9C981AC31; Wed, 16 Apr 2014 14:44:36 +0000 (UTC) From: Hannes Reinecke To: qemu-devel@nongnu.org Date: Wed, 16 Apr 2014 16:44:18 +0200 Message-Id: <1397659459-10069-7-git-send-email-hare@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1397659459-10069-1-git-send-email-hare@suse.de> References: <1397659459-10069-1-git-send-email-hare@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 195.135.220.15 Cc: Paolo Bonzini , Hannes Reinecke , Alexander Graf , Andreas Faerber Subject: [Qemu-devel] [PATCH 6/7] megasas: Decode register names X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org To ease debugging we should be decoding the register names. Signed-off-by: Hannes Reinecke --- hw/scsi/megasas.c | 22 +++++++++++++++++++--- trace-events | 4 ++-- 2 files changed, 21 insertions(+), 5 deletions(-) diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index a5bfeba..6d60427 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -1933,6 +1933,7 @@ static uint64_t megasas_mmio_read(void *opaque, hwaddr addr, switch (addr) { case MFI_IDB: retval = 0; + trace_megasas_mmio_readl("MFI_IDB", retval); break; case MFI_OMSG0: case MFI_OSP0: @@ -1940,6 +1941,8 @@ static uint64_t megasas_mmio_read(void *opaque, hwaddr addr, (s->fw_state & MFI_FWSTATE_MASK) | ((s->fw_sge & 0xff) << 16) | (s->fw_cmds & 0xFFFF); + trace_megasas_mmio_readl(addr == MFI_OMSG0 ? "MFI_OMSG0" : "MFI_OSP0", + retval); break; case MFI_OSTS: if (megasas_intr_enabled(s) && s->doorbell) { @@ -1949,21 +1952,24 @@ static uint64_t megasas_mmio_read(void *opaque, hwaddr addr, retval = MFI_1078_RM | 1; } } + trace_megasas_mmio_readl("MFI_OSTS", retval); break; case MFI_OMSK: retval = s->intr_mask; + trace_megasas_mmio_readl("MFI_OMSK", retval); break; case MFI_ODCR0: retval = s->doorbell; + trace_megasas_mmio_readl("MFI_ODCR0", retval); break; case MFI_DIAG: retval = s->diag; + trace_megasas_mmio_readl("MFI_DIAG", retval); break; default: trace_megasas_mmio_invalid_readl(addr); break; } - trace_megasas_mmio_readl(addr, retval); return retval; } @@ -1978,9 +1984,9 @@ static void megasas_mmio_write(void *opaque, hwaddr addr, uint32_t frame_count; int i; - trace_megasas_mmio_writel(addr, val); switch (addr) { case MFI_IDB: + trace_megasas_mmio_writel("MFI_IDB", val); if (val & MFI_FWINIT_ABORT) { /* Abort all pending cmds */ for (i = 0; i < s->fw_cmds; i++) { @@ -1996,6 +2002,7 @@ static void megasas_mmio_write(void *opaque, hwaddr addr, } break; case MFI_OMSK: + trace_megasas_mmio_writel("MFI_OMSK", val); s->intr_mask = val; if (!megasas_intr_enabled(s) && !msi_enabled(pci_dev) && @@ -2016,6 +2023,7 @@ static void megasas_mmio_write(void *opaque, hwaddr addr, } break; case MFI_ODCR0: + trace_megasas_mmio_writel("MFI_ODCR0", val); s->doorbell = 0; if (s->producer_pa && megasas_intr_enabled(s)) { /* Update reply queue pointer */ @@ -2029,13 +2037,19 @@ static void megasas_mmio_write(void *opaque, hwaddr addr, } break; case MFI_IQPH: + trace_megasas_mmio_writel("MFI_IQPH", val); /* Received high 32 bits of a 64 bit MFI frame address */ s->frame_hi = val; break; case MFI_IQPL: + trace_megasas_mmio_writel("MFI_IQPL", val); /* Received low 32 bits of a 64 bit MFI frame address */ case MFI_IQP: - /* Received 32 bit MFI frame address */ + if (addr == MFI_IQP) { + trace_megasas_mmio_writel("MFI_IQP", val); + /* Received 32 bit MFI frame address */ + s->frame_hi = 0; + } frame_addr = (val & ~0x1F); /* Add possible 64 bit offset */ frame_addr |= ((uint64_t)s->frame_hi << 32); @@ -2044,6 +2058,7 @@ static void megasas_mmio_write(void *opaque, hwaddr addr, megasas_handle_frame(s, frame_addr, frame_count); break; case MFI_SEQ: + trace_megasas_mmio_writel("MFI_SEQ", val); /* Magic sequence to start ADP reset */ if (adp_reset_seq[s->adp_reset] == val) { s->adp_reset++; @@ -2056,6 +2071,7 @@ static void megasas_mmio_write(void *opaque, hwaddr addr, } break; case MFI_DIAG: + trace_megasas_mmio_writel("MFI_DIAG", val); /* ADP reset */ if ((s->diag & MFI_DIAG_WRITE_ENABLE) && (val & MFI_DIAG_RESET_ADP)) { diff --git a/trace-events b/trace-events index c12fc02..f02cde5 100644 --- a/trace-events +++ b/trace-events @@ -679,9 +679,9 @@ megasas_intr_enabled(void) "Interrupts enabled" megasas_intr_disabled(void) "Interrupts disabled" megasas_msix_enabled(int vector) "vector %d" megasas_msi_enabled(int vector) "vector %d" -megasas_mmio_readl(unsigned long addr, uint32_t val) "addr 0x%lx: 0x%x" +megasas_mmio_readl(const char *reg, uint32_t val) "reg %s: 0x%x" megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx" -megasas_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" +megasas_mmio_writel(const char *reg, uint32_t val) "reg %s: 0x%x" megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" # hw/audio/milkymist-ac97.c