diff mbox

target-arm: A64: fix unallocated test of scalar SQXTUN

Message ID 1397647779-29287-1-git-send-email-alex.bennee@linaro.org
State New
Headers show

Commit Message

Alex Bennée April 16, 2014, 11:29 a.m. UTC 
The test for the U bit was incorrectly inverted in the scalar case of SQXTUN.
This doesn't affect the vector case as the U bit is used to select XTN(2).

Reported-by: Hao Liu <hao.liu@arm.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 target-arm/translate-a64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Claudio Fontana April 16, 2014, 11:35 a.m. UTC | #1 
On 16.04.2014 13:29, Alex Bennée wrote:
> The test for the U bit was incorrectly inverted in the scalar case of SQXTUN.
> This doesn't affect the vector case as the U bit is used to select XTN(2).
> 
> Reported-by: Hao Liu <hao.liu@arm.com>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  target-arm/translate-a64.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
> index a74128c..0adffbb 100644
> --- a/target-arm/translate-a64.c
> +++ b/target-arm/translate-a64.c
> @@ -7553,7 +7553,7 @@ static void disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn)
>          }
>          break;
>      case 0x12: /* SQXTUN */
> -        if (u) {
> +        if (!u) {
>              unallocated_encoding(s);
>              return;
>          }
> 

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Peter Maydell April 16, 2014, 11:41 a.m. UTC | #2 
On 16 April 2014 12:29, Alex Bennée <alex.bennee@linaro.org> wrote:
> The test for the U bit was incorrectly inverted in the scalar case of SQXTUN.
> This doesn't affect the vector case as the U bit is used to select XTN(2).
>
> Reported-by: Hao Liu <hao.liu@arm.com>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-stable@nongnu.org

-- PMM
diff mbox

Patch

diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index a74128c..0adffbb 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -7553,7 +7553,7 @@  static void disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn)
         }
         break;
     case 0x12: /* SQXTUN */
-        if (u) {
+        if (!u) {
             unallocated_encoding(s);
             return;
         }