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target-ppc: Remove PVR check from migration

Message ID 1397538370-30266-1-git-send-email-aik@ozlabs.ru
State New
Headers show

Commit Message

Alexey Kardashevskiy April 15, 2014, 5:06 a.m. UTC
Currently migration fails if CPU version (PVR register) is different
even a bit. This check is performed at the very end of migration when
device states are sent. This is too late for management software and
we need to provide a way for the user to make sure that migration
will succeed if QEMU is started with appropritate command line parameters.

This removes the PVR check.

This resets PVR to the default value as the existing VMSTATE record
for SPR array sends all 1024 registers unconditionally and overwrites
the destination PVR.

If the user wants some guarantees for migration to succeed, then
a CPU name or "host" CPU with a "compat" option (on its way to upsteam)
should be used and KVM or TCG is expected to fail on unsupported values
at the moment of QEMU start.

Cc: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---


We should propably reset to the default value all SPRs which do not have
env->spr_cb[num]->oea_write callback initialized. Yes, in a separate patch.
What can it possibly break?


---
 target-ppc/machine.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

Comments

Alexander Graf April 16, 2014, 10:52 a.m. UTC | #1
On 15.04.14 07:06, Alexey Kardashevskiy wrote:
> Currently migration fails if CPU version (PVR register) is different
> even a bit. This check is performed at the very end of migration when
> device states are sent. This is too late for management software and
> we need to provide a way for the user to make sure that migration
> will succeed if QEMU is started with appropritate command line parameters.
>
> This removes the PVR check.
>
> This resets PVR to the default value as the existing VMSTATE record
> for SPR array sends all 1024 registers unconditionally and overwrites
> the destination PVR.
>
> If the user wants some guarantees for migration to succeed, then
> a CPU name or "host" CPU with a "compat" option (on its way to upsteam)
> should be used and KVM or TCG is expected to fail on unsupported values
> at the moment of QEMU start.
>
> Cc: Bharata B Rao <bharata@linux.vnet.ibm.com>
> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> ---
>
>
> We should propably reset to the default value all SPRs which do not have
> env->spr_cb[num]->oea_write callback initialized. Yes, in a separate patch.
> What can it possibly break?

oea_write means that supervisor state can change the state. What about 
registers like LPCR which are hypervisor privileged? Those wouldn't have 
a callback, but still change thanks to H_SET_MODE, no?

Thanks, applied to ppc-next.


Alex

>
>
> ---
>   target-ppc/machine.c | 8 ++++++--
>   1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/target-ppc/machine.c b/target-ppc/machine.c
> index 063b379..df7cfc5 100644
> --- a/target-ppc/machine.c
> +++ b/target-ppc/machine.c
> @@ -160,6 +160,11 @@ static int cpu_post_load(void *opaque, int version_id)
>       CPUPPCState *env = &cpu->env;
>       int i;
>   
> +    /*
> +     * We always ignore the source PVR. The user or management
> +     * software has to take care of running QEMU in a compatible mode.
> +     */
> +    env->spr[SPR_PVR] = env->spr_cb[SPR_PVR].default_value;
>       env->lr = env->spr[SPR_LR];
>       env->ctr = env->spr[SPR_CTR];
>       env->xer = env->spr[SPR_XER];
> @@ -471,8 +476,7 @@ const VMStateDescription vmstate_ppc_cpu = {
>       .pre_save = cpu_pre_save,
>       .post_load = cpu_post_load,
>       .fields      = (VMStateField []) {
> -        /* Verify we haven't changed the pvr */
> -        VMSTATE_UINTTL_EQUAL(env.spr[SPR_PVR], PowerPCCPU),
> +        VMSTATE_UNUSED(sizeof(target_ulong)), /* was _EQUAL(env.spr[SPR_PVR]) */
>   
>           /* User mode architected state */
>           VMSTATE_UINTTL_ARRAY(env.gpr, PowerPCCPU, 32),
diff mbox

Patch

diff --git a/target-ppc/machine.c b/target-ppc/machine.c
index 063b379..df7cfc5 100644
--- a/target-ppc/machine.c
+++ b/target-ppc/machine.c
@@ -160,6 +160,11 @@  static int cpu_post_load(void *opaque, int version_id)
     CPUPPCState *env = &cpu->env;
     int i;
 
+    /*
+     * We always ignore the source PVR. The user or management
+     * software has to take care of running QEMU in a compatible mode.
+     */
+    env->spr[SPR_PVR] = env->spr_cb[SPR_PVR].default_value;
     env->lr = env->spr[SPR_LR];
     env->ctr = env->spr[SPR_CTR];
     env->xer = env->spr[SPR_XER];
@@ -471,8 +476,7 @@  const VMStateDescription vmstate_ppc_cpu = {
     .pre_save = cpu_pre_save,
     .post_load = cpu_post_load,
     .fields      = (VMStateField []) {
-        /* Verify we haven't changed the pvr */
-        VMSTATE_UINTTL_EQUAL(env.spr[SPR_PVR], PowerPCCPU),
+        VMSTATE_UNUSED(sizeof(target_ulong)), /* was _EQUAL(env.spr[SPR_PVR]) */
 
         /* User mode architected state */
         VMSTATE_UINTTL_ARRAY(env.gpr, PowerPCCPU, 32),