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[128.2.16.43]) by mx.google.com with ESMTPSA id 21sm21884140qgh.23.2014.04.14.13.55.25 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Apr 2014 13:55:25 -0700 (PDT) From: "Gabriel L. Somlo" To: qemu-devel@nongnu.org Date: Mon, 14 Apr 2014 16:55:06 -0400 Message-Id: <1397508911-18691-13-git-send-email-somlo@cmu.edu> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1397508911-18691-1-git-send-email-somlo@cmu.edu> References: <1397508911-18691-1-git-send-email-somlo@cmu.edu> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c04::232 Cc: seabios@seabios.org, agraf@suse.de, armbru@redhat.com, kevin@koconnor.net, kraxel@redhat.com, lersek@redhat.com Subject: [Qemu-devel] [QEMU v6 PATCH 12/17] SMBIOS: Remove SeaBIOS compatibility quirks X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org - Replace some arbitrarily hardcoded fields with proper "n/a" or "unknown" values; - Use QEMU-supplied default manufacturer and version strings; - Count CPUs starting with 0 instead of 1, to maintain uniformity with other multiple-instance items. Signed-off-by: Gabriel Somlo --- hw/i386/smbios.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) diff --git a/hw/i386/smbios.c b/hw/i386/smbios.c index 12cd06a..1b9465a 100644 --- a/hw/i386/smbios.c +++ b/hw/i386/smbios.c @@ -469,8 +469,8 @@ static void smbios_build_type_4_table(unsigned instance) SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version); t->voltage = 0; t->external_clock = 0; /* Unknown */ - t->max_speed = 2000; /* hardcoded in SeaBIOS (use 0/Unknown instead ?) */ - t->current_speed = 2000; /* hardcoded in SeaBIOS (use 0/Unknown ?) */ + t->max_speed = 0; /* Unknown */ + t->current_speed = 0; /* Unknown */ t->status = 0x41; /* Socket populated, CPU enabled */ t->processor_upgrade = 0x01; /* Other */ t->l1_cache_handle = 0xFFFF; /* N/A */ @@ -515,9 +515,9 @@ static void smbios_build_type_17_table(unsigned instance, ram_addr_t size) SMBIOS_BUILD_TABLE_PRE(17, 0x1100 + instance, true); /* required */ t->physical_memory_array_handle = 0x1000; /* Type 16 (Phys. Mem. Array) */ - t->memory_error_information_handle = 0; /* SeaBIOS, should be 0xFFFE(N/A) */ - t->total_width = 64; /* hardcoded in SeaBIOS */ - t->data_width = 64; /* hardcoded in SeaBIOS */ + t->memory_error_information_handle = 0xFFFE; /* Not provided */ + t->total_width = 0xFFFF; /* Unknown */ + t->data_width = 0xFFFF; /* Unknown */ size_mb = QEMU_ALIGN_UP(size, ONE_MB) / ONE_MB; if (size_mb < 0x7FFF) { t->size = size_mb; @@ -533,7 +533,7 @@ static void smbios_build_type_17_table(unsigned instance, ram_addr_t size) SMBIOS_TABLE_SET_STR(17, device_locator_str, loc_str); SMBIOS_TABLE_SET_STR(17, bank_locator_str, type17.bank); t->memory_type = 0x07; /* RAM */ - t->type_detail = 0; /* hardcoded in SeaBIOS */ + t->type_detail = 0x02; /* Other */ SMBIOS_BUILD_TABLE_POST; } @@ -624,7 +624,6 @@ void smbios_set_defaults(const char *manufacturer, ram_addr_t below_4g_mem_size, ram_addr_t above_4g_mem_size) { - const char *manufacturer_compat = "Bochs"; /* SeaBIOS compatibility */ smbios_have_defaults = true; assert(ram_size == below_4g_mem_size + above_4g_mem_size); @@ -640,15 +639,11 @@ void smbios_set_defaults(const char *manufacturer, SMBIOS_SET_DEFAULT(type2.manufacturer, manufacturer); SMBIOS_SET_DEFAULT(type2.product, product); SMBIOS_SET_DEFAULT(type2.version, version); - SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer_compat); - /* not set in SeaBIOS + SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer); SMBIOS_SET_DEFAULT(type3.version, version); - */ SMBIOS_SET_DEFAULT(type4.sock_pfx, "CPU"); - SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer_compat); - /* not set in SeaBIOS + SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer); SMBIOS_SET_DEFAULT(type4.version, version); - */ SMBIOS_SET_DEFAULT(type17.loc_pfx, "DIMM"); } @@ -687,8 +682,7 @@ void smbios_get_tables(uint8_t **tables, size_t *tables_len, smbios_build_type_2_table(); smbios_build_type_3_table(); for (i = 0; i < smp_cpus; i++) { - /* count CPUs starting with 1, to minimize diff vs. SeaBIOS */ - smbios_build_type_4_table(i + 1); + smbios_build_type_4_table(i); } /* SeaBIOS expects tables compliant to smbios v2.4;