From patchwork Tue Feb 18 17:55:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 321596 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3E9382C014B for ; Wed, 19 Feb 2014 04:56:19 +1100 (EST) Received: from localhost ([::1]:52454 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WFou0-0006Wp-Uz for incoming@patchwork.ozlabs.org; Tue, 18 Feb 2014 12:56:16 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51970) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WFotl-0006TE-Bu for qemu-devel@nongnu.org; Tue, 18 Feb 2014 12:56:02 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WFotk-0005WV-FR for qemu-devel@nongnu.org; Tue, 18 Feb 2014 12:56:01 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:46003) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WFotk-0005W5-8v for qemu-devel@nongnu.org; Tue, 18 Feb 2014 12:56:00 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WFoti-0002gi-2P; Tue, 18 Feb 2014 17:55:58 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 18 Feb 2014 17:55:58 +0000 Message-Id: <1392746158-10307-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: Christoffer Dall , patches@linaro.org Subject: [Qemu-devel] [PATCH] hw/intc/arm_gic: Fix NVIC assertion failure X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Commit 40d225009ef accidentally changed the behaviour of gic_acknowledge_irq() for the NVIC. The NVIC doesn't have SGIs, so this meant we hit an assertion: gic_acknowledge_irq: Assertion `s->sgi_pending[irq][cpu] != 0' failed. Return NVIC acknowledge-irq to its previous behaviour, like 11MPCore. Signed-off-by: Peter Maydell Reviewed-by: Christoffer Dall --- Oops. I think I mentioned that NVIC should behave like 11MPcore in one of the rounds of code review, but then didn't spot that this if() had been missed. We get the checks right elsewhere. hw/intc/arm_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 93eaa6b..955b8d4 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -189,7 +189,7 @@ uint32_t gic_acknowledge_irq(GICState *s, int cpu) } s->last_active[irq][cpu] = s->running_irq[cpu]; - if (s->revision == REV_11MPCORE) { + if (s->revision == REV_11MPCORE || s->revision == REV_NVIC) { /* Clear pending flags for both level and edge triggered interrupts. * Level triggered IRQs will be reasserted once they become inactive. */