From patchwork Mon Feb 10 17:26:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Musta X-Patchwork-Id: 318838 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 369F62C00B8 for ; Tue, 11 Feb 2014 04:31:50 +1100 (EST) Received: from localhost ([::1]:56983 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WCuhv-0001rW-A5 for incoming@patchwork.ozlabs.org; Mon, 10 Feb 2014 12:31:47 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33895) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WCueD-0004ZL-H9 for qemu-devel@nongnu.org; Mon, 10 Feb 2014 12:28:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WCue5-0002S6-4b for qemu-devel@nongnu.org; Mon, 10 Feb 2014 12:27:57 -0500 Received: from mail-qc0-x233.google.com ([2607:f8b0:400d:c01::233]:54050) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WCue5-0002Rw-0X; Mon, 10 Feb 2014 12:27:49 -0500 Received: by mail-qc0-f179.google.com with SMTP id e16so10937305qcx.38 for ; Mon, 10 Feb 2014 09:27:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Oakl9miFcqN7zg/FBWR4oRIm5E3KEoQIa4ZgLkXwZLQ=; b=a/2lHNuS9i2bG/M0/YihlluYfgbK0mOxOEPqJJ2KU3WXkywv/8/Qb4YBdyh//O/qGh yYL9GxZziAoTK367p8zX1nJgVfrU5EKC+kUXRvy4eyd0ucVnhEaSXtVuXoTNaxN6YjCV CMoCRQwon+z69QDb+PMZL0yiPJUNDaVLXKSrPAVsfU+Ksz8O1I/htEETHnRytOCyWshW fdCrPbHNfhskVZgNg9f0t3gvK+qukuD9lbhYZ8E/ST56S0bEW0CbI44EBTnsxVuzds6H zoqtcAFps9lWxbNKQZ5tyWFh1qYTcQt7mNNWoRePhXzZO+fW0fOh8nGeGcGMuCJtBQFC KlZg== X-Received: by 10.140.82.8 with SMTP id g8mr47496896qgd.88.1392053263637; Mon, 10 Feb 2014 09:27:43 -0800 (PST) Received: from tmusta-sc.rchland.ibm.com (rchp4.rochester.ibm.com. [129.42.161.36]) by mx.google.com with ESMTPSA id b30sm24625162qge.21.2014.02.10.09.27.41 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 10 Feb 2014 09:27:43 -0800 (PST) From: Tom Musta To: qemu-devel@nongnu.org Date: Mon, 10 Feb 2014 11:26:53 -0600 Message-Id: <1392053222-7645-2-git-send-email-tommusta@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1392053222-7645-1-git-send-email-tommusta@gmail.com> References: <1392053222-7645-1-git-send-email-tommusta@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c01::233 Cc: Tom Musta , qemu-ppc@nongnu.org Subject: [Qemu-devel] [V3 PATCH 1/9] target-ppc: Add Flag for bctar X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch adds a flag for the bctar instruction. This instruction is being introduced via Power ISA 2.07. Also, the flag is added to the Power8 machine model since the P8 processor supports this instruction. Signed-off-by: Tom Musta --- target-ppc/cpu.h | 6 ++++-- target-ppc/translate_init.c | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 2b8c205..b9d6b10 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1887,12 +1887,14 @@ enum { PPC2_FP_CVT_ISA206 = 0x0000000000000400ULL, /* ISA 2.06B floating point test instructions */ PPC2_FP_TST_ISA206 = 0x0000000000000800ULL, - + /* ISA 2.07 bctar instruction */ + PPC2_BCTAR_ISA207 = 0x0000000000001000ULL, #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \ PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \ PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | \ - PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206) + PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \ + PPC2_BCTAR_ISA207) }; /*****************************************************************************/ diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index a83c964..62bb200 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7327,7 +7327,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX | PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 | - PPC2_FP_TST_ISA206; + PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207; pcc->msr_mask = 0x800000000284FF36ULL; pcc->mmu_model = POWERPC_MMU_2_06; #if defined(CONFIG_SOFTMMU)