From patchwork Fri Jan 31 15:45:12 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 315739 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 7B87F2C00AD for ; Sat, 1 Feb 2014 03:07:39 +1100 (EST) Received: from localhost ([::1]:56590 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W9Gcy-0004ne-WB for incoming@patchwork.ozlabs.org; Fri, 31 Jan 2014 11:07:37 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38702) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W9GUT-00007J-Ql for qemu-devel@nongnu.org; Fri, 31 Jan 2014 10:58:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W9GUS-0005Qh-Dx for qemu-devel@nongnu.org; Fri, 31 Jan 2014 10:58:49 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:45421) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W9GUS-0005Pb-8C for qemu-devel@nongnu.org; Fri, 31 Jan 2014 10:58:48 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1W9GHn-00080H-JK; Fri, 31 Jan 2014 15:45:43 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 31 Jan 2014 15:45:12 +0000 Message-Id: <1391183143-30724-5-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1391183143-30724-1-git-send-email-peter.maydell@linaro.org> References: <1391183143-30724-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: Rob Herring , Peter Crosthwaite , patches@linaro.org, Michael Matz , Alexander Graf , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?UTF-8?q?Alex=20Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall , Richard Henderson Subject: [Qemu-devel] [PATCH v2 04/35] target-arm: Restrict check_ap() use of S and R bits to v6 and earlier X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The SCTLR bits S and R (8 and 9) only exist in ARMv6 and earlier. In ARMv7 these bits RAZ, and in ARMv8 they are reassigned. Guard the use of them in check_ap() so that we don't get incorrect results for ARMv8 CPUs. Signed-off-by: Peter Maydell Reviewed-by: Peter Crosthwaite --- target-arm/helper.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index d670db8..6f1ec46 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2765,6 +2765,9 @@ static inline int check_ap(CPUARMState *env, int ap, int domain_prot, switch (ap) { case 0: + if (arm_feature(env, ARM_FEATURE_V7)) { + return 0; + } if (access_type == 1) return 0; switch (env->cp15.c1_sys & (SCTLR_S | SCTLR_R)) {