@@ -37,13 +37,7 @@ Scope(\_SB.PCI0) {
0x0000, // Address Translation Offset
0x0CF8, // Address Length
,, , TypeStatic)
- WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
- 0x0000, // Address Space Granularity
- 0x0D00, // Address Range Minimum
- 0xFFFF, // Address Range Maximum
- 0x0000, // Address Translation Offset
- 0xF300, // Address Length
- ,, , TypeStatic)
+ BOARD_SPECIFIC_PCI_RESOURSES
DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Address Space Granularity
0x000A0000, // Address Range Minimum
@@ -35,6 +35,38 @@ DefinitionBlock (
/****************************************************************
* PCI Bus definition
****************************************************************/
+#define BOARD_SPECIFIC_PCI_RESOURSES \
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
+ 0x0000, \
+ 0x0D00, \
+ 0xADFF, \
+ 0x0000, \
+ 0xA100, \
+ ,, , TypeStatic) \
+ /* 0xae00-0xae0e hole for PCI hotplug, hw/acpi/piix4.c:PCI_HOTPLUG_ADDR */ \
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
+ 0x0000, \
+ 0xAE0F, \
+ 0xAEFF, \
+ 0x0000, \
+ 0x00F1, \
+ ,, , TypeStatic) \
+ /* 0xaf00-0xaf1f hole for CPU hotplug, hw/acpi/piix4.c:PIIX4_PROC_BASE */ \
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
+ 0x0000, \
+ 0xAF20, \
+ 0xAFDF, \
+ 0x0000, \
+ 0x00C0, \
+ ,, , TypeStatic) \
+ /* 0xafe0-0xafe3 hole for ACPI.GPE0, hw/acpi/piix4.c:GPE_BASE */ \
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
+ 0x0000, \
+ 0xAFE4, \
+ 0xFFFF, \
+ 0x0000, \
+ 0x501C, \
+ ,, , TypeStatic)
Scope(\_SB) {
Device(PCI0) {
@@ -48,6 +48,14 @@ DefinitionBlock (
/****************************************************************
* PCI Bus definition
****************************************************************/
+#define BOARD_SPECIFIC_PCI_RESOURSES \
+ WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
+ 0x0000, \
+ 0x0D00, \
+ 0xFFFF, \
+ 0x0000, \
+ 0xF300, \
+ ,, , TypeStatic)
Scope(\_SB) {
Device(PCI0) {
.. so that they might not be used by PCI devices. Note: Resort to concatenating templates with preprocessor help, because 1.0b spec isn't supporting ConcatenateResTemplate, as result Windows XP fails to execute PCI0._CRS method if ConcatenateResTemplate() is used. Signed-off-by: Igor Mammedov <imammedo@redhat.com> --- Follow up patch will expose them as motherboard resources v2: * add comments about holes origins for PCI/CPU hotplug and GPE0 --- hw/i386/acpi-dsdt-pci-crs.dsl | 8 +------- hw/i386/acpi-dsdt.dsl | 32 ++++++++++++++++++++++++++++++++ hw/i386/q35-acpi-dsdt.dsl | 8 ++++++++ 3 files changed, 41 insertions(+), 7 deletions(-)