From patchwork Mon Jan 6 13:11:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 307287 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 895DA2C00D2 for ; Tue, 7 Jan 2014 00:29:21 +1100 (EST) Received: from localhost ([::1]:34992 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0AF2-0000rh-EW for incoming@patchwork.ozlabs.org; Mon, 06 Jan 2014 08:29:16 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38792) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0ACn-0006hm-Cw for qemu-devel@nongnu.org; Mon, 06 Jan 2014 08:26:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W0ACl-0003qt-Gq for qemu-devel@nongnu.org; Mon, 06 Jan 2014 08:26:57 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:44407) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W0ACl-0003pp-9x for qemu-devel@nongnu.org; Mon, 06 Jan 2014 08:26:55 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1W09xi-00047D-Ie; Mon, 06 Jan 2014 13:11:22 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 6 Jan 2014 13:11:14 +0000 Message-Id: <1389013881-15726-18-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1389013881-15726-1-git-send-email-peter.maydell@linaro.org> References: <1389013881-15726-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: Tom Musta , Peter Crosthwaite , patches@linaro.org, Michael Matz , Alexander Graf , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?UTF-8?q?Alex=20Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall , Richard Henderson Subject: [Qemu-devel] [PATCH v2 17/24] target-arm: Prepare VFP_CONV_FIX helpers for A64 uses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Will Newton Make the VFP_CONV_FIX helpers a little more flexible in preparation for the A64 uses. This requires two changes: * use the correct softfloat conversion function based on itype rather than always the int32 one; this is possible now that softfloat provides int16 versions and necessary for the future conversion-to-int64 A64 variants. This also allows us to drop the awkward 'sign' macro argument. * split the 'fsz' argument which currently controls both width of the input float type and width of the output integer type into two; this will allow us to specify the A64 64-bit-int-to-single conversion function, where the two widths are different. We can also drop the (itype##_t) cast now that softfloat guarantees that all the itype##_to_float* functions take an integer argument of exactly the correct type. Signed-off-by: Will Newton Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target-arm/helper.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index d27e528..501d798 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3976,17 +3976,17 @@ float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env) } /* VFP3 fixed point conversion. */ -#define VFP_CONV_FIX(name, p, fsz, itype, sign) \ -float##fsz HELPER(vfp_##name##to##p)(uint##fsz##_t x, uint32_t shift, \ - void *fpstp) \ +#define VFP_CONV_FIX(name, p, fsz, isz, itype) \ +float##fsz HELPER(vfp_##name##to##p)(uint##isz##_t x, uint32_t shift, \ + void *fpstp) \ { \ float_status *fpst = fpstp; \ float##fsz tmp; \ - tmp = sign##int32_to_##float##fsz((itype##_t)x, fpst); \ + tmp = itype##_to_##float##fsz(x, fpst); \ return float##fsz##_scalbn(tmp, -(int)shift, fpst); \ } \ -uint##fsz##_t HELPER(vfp_to##name##p)(float##fsz x, uint32_t shift, \ - void *fpstp) \ +uint##isz##_t HELPER(vfp_to##name##p)(float##fsz x, uint32_t shift, \ + void *fpstp) \ { \ float_status *fpst = fpstp; \ float##fsz tmp; \ @@ -3998,14 +3998,14 @@ uint##fsz##_t HELPER(vfp_to##name##p)(float##fsz x, uint32_t shift, \ return float##fsz##_to_##itype##_round_to_zero(tmp, fpst); \ } -VFP_CONV_FIX(sh, d, 64, int16, ) -VFP_CONV_FIX(sl, d, 64, int32, ) -VFP_CONV_FIX(uh, d, 64, uint16, u) -VFP_CONV_FIX(ul, d, 64, uint32, u) -VFP_CONV_FIX(sh, s, 32, int16, ) -VFP_CONV_FIX(sl, s, 32, int32, ) -VFP_CONV_FIX(uh, s, 32, uint16, u) -VFP_CONV_FIX(ul, s, 32, uint32, u) +VFP_CONV_FIX(sh, d, 64, 64, int16) +VFP_CONV_FIX(sl, d, 64, 64, int32) +VFP_CONV_FIX(uh, d, 64, 64, uint16) +VFP_CONV_FIX(ul, d, 64, 64, uint32) +VFP_CONV_FIX(sh, s, 32, 32, int16) +VFP_CONV_FIX(sl, s, 32, 32, int32) +VFP_CONV_FIX(uh, s, 32, 32, uint16) +VFP_CONV_FIX(ul, s, 32, 32, uint32) #undef VFP_CONV_FIX /* Half precision conversions. */