From patchwork Fri Jan 3 18:22:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Musta X-Patchwork-Id: 306652 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 65CCD2C00A5 for ; Sat, 4 Jan 2014 05:23:34 +1100 (EST) Received: from localhost ([::1]:51197 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vz9P9-0004r8-VZ for incoming@patchwork.ozlabs.org; Fri, 03 Jan 2014 13:23:31 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45112) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vz9OT-0004el-JV for qemu-devel@nongnu.org; Fri, 03 Jan 2014 13:22:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vz9OM-00009j-SW for qemu-devel@nongnu.org; Fri, 03 Jan 2014 13:22:49 -0500 Received: from mail-qe0-x234.google.com ([2607:f8b0:400d:c02::234]:34232) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vz9OM-00009C-PZ; Fri, 03 Jan 2014 13:22:42 -0500 Received: by mail-qe0-f52.google.com with SMTP id ne12so16008217qeb.11 for ; Fri, 03 Jan 2014 10:22:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zy+II3fHJooozwtNkagsEDaEmOb9HCQ0wKZeDGKRXVE=; b=woPKuUK60+pRW0tArEhTfja0FlF5NGlU/g1i2GqNrqCcd//mHQjlyULPD6NrPD4MnN lYbjggRuEboP+/JYk0AeFoXb1CHepG1bKaBcwySgiVMGUxox6QLmkO5K1tJcGd6u3rwS WqYGY3gsGgAKwJUQFJQM09wVYuopWgwn5oA1od9Tvtl/Op58ORe664IkwbCiMVMteYtI zKzNNwnmp5AmJZ4FfCmQQt5BBdCOp3u0h2jcOCVHdX75UIthaB6mtN6ZOD0TDkAygonH KiKe7dWhaK3Kdn4x4DOT2lW5aY+ubFA6PVEVqsQ2EDlTYO96L7P3OgqhCxe0u9dpEfI+ U4kg== X-Received: by 10.224.65.135 with SMTP id j7mr28450566qai.10.1388773362430; Fri, 03 Jan 2014 10:22:42 -0800 (PST) Received: from tmusta-sc.rchland.ibm.com (rchp4.rochester.ibm.com. [129.42.161.36]) by mx.google.com with ESMTPSA id f5sm22839079qas.11.2014.01.03.10.22.41 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 03 Jan 2014 10:22:41 -0800 (PST) From: Tom Musta To: qemu-devel@nongnu.org Date: Fri, 3 Jan 2014 12:22:01 -0600 Message-Id: <1388773331-787-5-git-send-email-tommusta@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1388773331-787-1-git-send-email-tommusta@gmail.com> References: <1388773331-787-1-git-send-email-tommusta@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c02::234 Cc: Tom Musta , qemu-ppc@nongnu.org Subject: [Qemu-devel] [V5 PATCH 04/14] target-ppc: VSX Stage 4: Refactor stxsdx X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch refactors the stxsdx instruction. Reusable code is extracted into a macro which will be used in subsequent patches in this series. Signed-off-by: Tom Musta Reviewed-by: Richard Henderson --- target-ppc/translate.c | 27 +++++++++++++++------------ 1 files changed, 15 insertions(+), 12 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 958ea94..9f3dda7 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7112,20 +7112,23 @@ static void gen_lxvw4x(DisasContext *ctx) tcg_temp_free_i64(tmp); } -static void gen_stxsdx(DisasContext *ctx) -{ - TCGv EA; - if (unlikely(!ctx->vsx_enabled)) { - gen_exception(ctx, POWERPC_EXCP_VSXU); - return; - } - gen_set_access_type(ctx, ACCESS_INT); - EA = tcg_temp_new(); - gen_addr_reg_index(ctx, EA); - gen_qemu_st64(ctx, cpu_vsrh(xS(ctx->opcode)), EA); - tcg_temp_free(EA); +#define VSX_STORE_SCALAR(name, operation) \ +static void gen_##name(DisasContext *ctx) \ +{ \ + TCGv EA; \ + if (unlikely(!ctx->vsx_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VSXU); \ + return; \ + } \ + gen_set_access_type(ctx, ACCESS_INT); \ + EA = tcg_temp_new(); \ + gen_addr_reg_index(ctx, EA); \ + gen_qemu_##operation(ctx, cpu_vsrh(xS(ctx->opcode)), EA); \ + tcg_temp_free(EA); \ } +VSX_STORE_SCALAR(stxsdx, st64) + static void gen_stxvd2x(DisasContext *ctx) { TCGv EA;