From patchwork Thu Jan 2 22:21:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Musta X-Patchwork-Id: 306303 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 91AAB2C00A7 for ; Fri, 3 Jan 2014 09:24:17 +1100 (EST) Received: from localhost ([::1]:47244 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VyqgZ-0001oL-DL for incoming@patchwork.ozlabs.org; Thu, 02 Jan 2014 17:24:15 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38524) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VyqeL-0006zU-Qt for qemu-devel@nongnu.org; Thu, 02 Jan 2014 17:22:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VyqeC-0004gT-Jg for qemu-devel@nongnu.org; Thu, 02 Jan 2014 17:21:57 -0500 Received: from mail-qa0-x236.google.com ([2607:f8b0:400d:c00::236]:46523) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VyqeC-0004fS-Et; Thu, 02 Jan 2014 17:21:48 -0500 Received: by mail-qa0-f54.google.com with SMTP id f11so13679358qae.6 for ; Thu, 02 Jan 2014 14:21:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/Ee+JLdb/cRm0dnCM/851nBblpjtXDt57xeY1IzG6G8=; b=Pib+PKyGmgDP+Ewxh02w0YRJNxxvOP8cb2/lgIT89gwafSkewMGdVhqb8Xe7RAxSSL bm4ezm1OM/9KlvFbXeeIieXu7Ja9HnXNPUIcsx0NIgqt870jDf9JzZbmxHyQwQKPSN3f Ss4nfyHVOffJ9dVohkuz3o1YlFgNXS7gPocNEZdZep5G4a60xviczJMrwXK4A1LirtPx Kn/dIqY1R9ilcjtHOccbkhxLbcOnvgKo57ncAQNJwzIfooOGIOeoQ7o3O0I8a1jwMTNx hw4/FEPo/K9h0RyXVaYfNLKu+RG7mAxElZVitP32QbA/fXV6QsXlWFawJ/peQ+D1DrCb o72w== X-Received: by 10.229.13.133 with SMTP id c5mr140727294qca.22.1388701308025; Thu, 02 Jan 2014 14:21:48 -0800 (PST) Received: from tmusta-sc.rchland.ibm.com (rchp4.rochester.ibm.com. [129.42.161.36]) by mx.google.com with ESMTPSA id j9sm76301098qeo.18.2014.01.02.14.21.46 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 02 Jan 2014 14:21:47 -0800 (PST) From: Tom Musta To: qemu-devel@nongnu.org Date: Thu, 2 Jan 2014 16:21:17 -0600 Message-Id: <1388701295-29855-5-git-send-email-tommusta@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1388701295-29855-1-git-send-email-tommusta@gmail.com> References: <1388701295-29855-1-git-send-email-tommusta@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c00::236 Cc: Tom Musta , qemu-ppc@nongnu.org Subject: [Qemu-devel] [V5 PATCH 04/22] softfloat: Fix float64_to_uint32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The float64_to_uint32 has several flaws: - for numbers between 2**32 and 2**64, the inexact exception flag may get incorrectly set. In this case, only the invalid flag should be set. test pattern: 425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38 - for numbers between 2**63 and 2**64, incorrect results may be produced: test pattern: 43EAAF73F1F0B8BD / 0x1.aaf73f1f0b8bdp+63 This patch re-implements float64_to_uint32 to re-use the float64_to_uint64 routine (instead of float64_to_int64). For the saturation case, only the invalid exception flag is raised. This contribution can be licensed under either the softfloat-2a or -2b license. Signed-off-by: Tom Musta Reviewed-by: Peter Maydell --- V4: Fixed handling of stickiness of the inexact bit per comments from Peter Maydell. fpu/softfloat.c | 15 +++++++-------- 1 files changed, 7 insertions(+), 8 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 67ee37b..640cd71 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -6579,19 +6579,18 @@ uint_fast16_t float32_to_uint16_round_to_zero(float32 a STATUS_PARAM) uint32 float64_to_uint32( float64 a STATUS_PARAM ) { - int64_t v; + uint64_t v; uint32 res; + int old_exc_flags = get_float_exception_flags(status); - v = float64_to_int64(a STATUS_VAR); - if (v < 0) { - res = 0; - float_raise( float_flag_invalid STATUS_VAR); - } else if (v > 0xffffffff) { + v = float64_to_uint64(a STATUS_VAR); + if (v > 0xffffffff) { res = 0xffffffff; - float_raise( float_flag_invalid STATUS_VAR); } else { - res = v; + return v; } + set_float_exception_flags(old_exc_flags, status); + float_raise(float_flag_invalid STATUS_VAR); return res; }