From patchwork Tue Dec 31 13:35:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 305874 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B26162C00AD for ; Wed, 1 Jan 2014 00:37:43 +1100 (EST) Received: from localhost ([::1]:33682 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VxzVt-0006n3-Cp for incoming@patchwork.ozlabs.org; Tue, 31 Dec 2013 08:37:41 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41502) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VxzUX-000588-HA for qemu-devel@nongnu.org; Tue, 31 Dec 2013 08:36:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VxzUV-0000Ue-Fv for qemu-devel@nongnu.org; Tue, 31 Dec 2013 08:36:17 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:44050) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VxzUV-0000TO-8Q for qemu-devel@nongnu.org; Tue, 31 Dec 2013 08:36:15 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1VxzUE-0000w5-JG; Tue, 31 Dec 2013 13:35:58 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 31 Dec 2013 13:35:43 +0000 Message-Id: <1388496958-3542-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1388496958-3542-1-git-send-email-peter.maydell@linaro.org> References: <1388496958-3542-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: Tom Musta , Peter Crosthwaite , patches@linaro.org, Aurelien Jarno , Michael Matz , Alexander Graf , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?UTF-8?q?Alex=20Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall , Richard Henderson Subject: [Qemu-devel] [PATCH 07/22] softfloat: Add float32_to_uint64() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Tom Musta This patch adds the float32_to_uint64() routine, which converts a 32-bit floating point number to an unsigned 64 bit number. This contribution can be licensed under either the softfloat-2a or -2b license. V2: Reduced patch to just this single routine per feedback from Peter Maydell. V4: Now passing sign to roundAndPackUint64() Signed-off-by: Tom Musta Message-id: 1387397961-4894-3-git-send-email-tommusta@gmail.com PMM notes: * signed NaNs again * not convinced about handling of negative-but-round-to-zero inputs --- fpu/softfloat.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ include/fpu/softfloat.h | 1 + 2 files changed, 46 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 1af6ca5..af37164 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -1558,6 +1558,51 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) /*---------------------------------------------------------------------------- | Returns the result of converting the single-precision floating-point value +| `a' to the 64-bit unsigned integer format. The conversion is +| performed according to the IEC/IEEE Standard for Binary Floating-Point +| Arithmetic---which means in particular that the conversion is rounded +| according to the current rounding mode. If `a' is a NaN, the largest +| unsigned integer is returned. Otherwise, if the conversion overflows, the +| largest unsigned integer is returned. If the 'a' is negative, zero is +| returned. +*----------------------------------------------------------------------------*/ + +uint64 float32_to_uint64(float32 a STATUS_PARAM) +{ + flag aSign; + int_fast16_t aExp, shiftCount; + uint32_t aSig; + uint64_t aSig64, aSigExtra; + a = float32_squash_input_denormal(a STATUS_VAR); + + aSig = extractFloat32Frac(a); + aExp = extractFloat32Exp(a); + aSign = extractFloat32Sign(a); + if (aSign) { + if (aExp) { + float_raise(float_flag_invalid STATUS_VAR); + } else if (aSig) { /* negative denormalized */ + float_raise(float_flag_inexact STATUS_VAR); + } + return 0; + } + shiftCount = 0xBE - aExp; + if (aExp) { + aSig |= 0x00800000; + } + if (shiftCount < 0) { + float_raise(float_flag_invalid STATUS_VAR); + return (int64_t)LIT64(0xFFFFFFFFFFFFFFFF); + } + + aSig64 = aSig; + aSig64 <<= 40; + shift64ExtraRightJamming(aSig64, 0, shiftCount, &aSig64, &aSigExtra); + return roundAndPackUint64(aSign, aSig64, aSigExtra STATUS_VAR); +} + +/*---------------------------------------------------------------------------- +| Returns the result of converting the single-precision floating-point value | `a' to the 64-bit two's complement integer format. The conversion is | performed according to the IEC/IEEE Standard for Binary Floating-Point | Arithmetic, except that the conversion is always rounded toward zero. If diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 3790b10..c49e836 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -291,6 +291,7 @@ int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); uint32 float32_to_uint32( float32 STATUS_PARAM ); uint32 float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); int64 float32_to_int64( float32 STATUS_PARAM ); +uint64 float32_to_uint64(float32 STATUS_PARAM); int64 float32_to_int64_round_to_zero( float32 STATUS_PARAM ); float64 float32_to_float64( float32 STATUS_PARAM ); floatx80 float32_to_floatx80( float32 STATUS_PARAM );