From patchwork Thu Dec 19 05:51:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 303187 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id EE3022C009A for ; Thu, 19 Dec 2013 17:01:52 +1100 (EST) Received: from localhost ([::1]:42242 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VtWgA-0002ty-3i for incoming@patchwork.ozlabs.org; Thu, 19 Dec 2013 01:01:50 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60169) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VtWe6-0000Tz-PE for qemu-devel@nongnu.org; Thu, 19 Dec 2013 00:59:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VtWe0-0000qo-TM for qemu-devel@nongnu.org; Thu, 19 Dec 2013 00:59:42 -0500 Received: from mail-pb0-x236.google.com ([2607:f8b0:400e:c01::236]:60385) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VtWe0-0000qi-HT for qemu-devel@nongnu.org; Thu, 19 Dec 2013 00:59:36 -0500 Received: by mail-pb0-f54.google.com with SMTP id un15so689262pbc.41 for ; Wed, 18 Dec 2013 21:59:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=C+qeAV/sAREmkOXg7smygglWRz4vAOk8VZS45eFHzk0=; b=mMppdc50zuP1FMC3JVgvW4c6HtJPvcCzg4QGPZH9LjeL71er0kg3UmialHuA3RUPzJ 44Plx2CsDoUqE2gmOymaAQfVK20/QnlRSxd6MwDnDFqf7LetZigvGg0kZj3GbrKze+K6 iSv1jmaTmDgeUM9TToqXRKGDMNayMV4Pf04vz3099mzjTGJlVR1rJ6xOHTo+ocXxKWV2 SoEfHsdxpePleGN8h2Mwy0z6OMNBXPNrPjCfeSnuos6wwEbOj1hGkqDtD8BJlOruZmoh m1wxWV/v/NNwbW6OVlMHTys0RonE9Cnd/YBN9vgRj0OG8Kwznf/QcwHNg8Aam68Uvb+4 rVFg== X-Received: by 10.68.241.134 with SMTP id wi6mr38401196pbc.44.1387432775558; Wed, 18 Dec 2013 21:59:35 -0800 (PST) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id hw10sm4357202pbc.24.2013.12.18.21.59.34 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 18 Dec 2013 21:59:34 -0800 (PST) From: edgar.iglesias@gmail.com To: qemu-devel@nongnu.org Date: Thu, 19 Dec 2013 15:51:24 +1000 Message-Id: <1387432293-17711-14-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1387432293-17711-1-git-send-email-edgar.iglesias@gmail.com> References: <1387432293-17711-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c01::236 Cc: peter.maydell@linaro.org, blauwirbel@gmail.com, aliguori@amazon.com, pcrost@xilinx.com, pbonzini@redhat.com, afaerber@suse.de, aurelien@aurel32.net, rth@twiddle.net Subject: [Qemu-devel] [PATCH v2 13/22] exec: Make stl_phys_notdirty input an AddressSpace X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- exec.c | 4 ++-- hw/arm/boot.c | 9 +++++---- hw/arm/highbank.c | 6 +++--- include/exec/cpu-common.h | 2 +- target-i386/helper.c | 16 ++++++++-------- target-sparc/mmu_helper.c | 2 +- 6 files changed, 20 insertions(+), 19 deletions(-) diff --git a/exec.c b/exec.c index 032e6dc..c88b6f0 100644 --- a/exec.c +++ b/exec.c @@ -2493,14 +2493,14 @@ uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr) /* warning: addr must be aligned. The ram page is not masked as dirty and the code inside is not invalidated. It is useful if the dirty bits are used to track modified PTEs */ -void stl_phys_notdirty(hwaddr addr, uint32_t val) +void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val) { uint8_t *ptr; MemoryRegion *mr; hwaddr l = 4; hwaddr addr1; - mr = address_space_translate(&address_space_memory, addr, &addr1, &l, + mr = address_space_translate(as, addr, &addr1, &l, true); if (l < 4 || !memory_access_is_direct(mr, true)) { io_mem_write(mr, addr1, val, 4); diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 55d552f..b04d386 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -16,6 +16,7 @@ #include "elf.h" #include "sysemu/device_tree.h" #include "qemu/config-file.h" +#include "exec/address-spaces.h" #define KERNEL_ARGS_ADDR 0x100 #define KERNEL_LOAD_ADDR 0x00010000 @@ -88,13 +89,13 @@ static void default_reset_secondary(ARMCPU *cpu, { CPUARMState *env = &cpu->env; - stl_phys_notdirty(info->smp_bootreg_addr, 0); + stl_phys_notdirty(&address_space_memory, info->smp_bootreg_addr, 0); env->regs[15] = info->smp_loader_start; } -#define WRITE_WORD(p, value) do { \ - stl_phys_notdirty(p, value); \ - p += 4; \ +#define WRITE_WORD(p, value) do { \ + stl_phys_notdirty(&address_space_memory, p, value); \ + p += 4; \ } while (0) static void set_kernel_args(const struct arm_boot_info *info) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index fe98ef1..2e95967 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -68,11 +68,11 @@ static void hb_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info) switch (info->nb_cpus) { case 4: - stl_phys_notdirty(SMP_BOOT_REG + 0x30, 0); + stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x30, 0); case 3: - stl_phys_notdirty(SMP_BOOT_REG + 0x20, 0); + stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x20, 0); case 2: - stl_phys_notdirty(SMP_BOOT_REG + 0x10, 0); + stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x10, 0); env->regs[15] = SMP_BOOT_ADDR; break; default: diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index b29065d..dd5feab 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -102,7 +102,7 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val); uint32_t lduw_phys(AddressSpace *as, hwaddr addr); uint32_t ldl_phys(AddressSpace *as, hwaddr addr); uint64_t ldq_phys(AddressSpace *as, hwaddr addr); -void stl_phys_notdirty(hwaddr addr, uint32_t val); +void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val); void stw_phys(hwaddr addr, uint32_t val); void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val); void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val); diff --git a/target-i386/helper.c b/target-i386/helper.c index 294cfdb..d2f0f3e 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -568,7 +568,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, } if (!(pml4e & PG_ACCESSED_MASK)) { pml4e |= PG_ACCESSED_MASK; - stl_phys_notdirty(pml4e_addr, pml4e); + stl_phys_notdirty(cs->as, pml4e_addr, pml4e); } ptep = pml4e ^ PG_NX_MASK; pdpe_addr = ((pml4e & PHYS_ADDR_MASK) + (((addr >> 30) & 0x1ff) << 3)) & @@ -585,7 +585,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, ptep &= pdpe ^ PG_NX_MASK; if (!(pdpe & PG_ACCESSED_MASK)) { pdpe |= PG_ACCESSED_MASK; - stl_phys_notdirty(pdpe_addr, pdpe); + stl_phys_notdirty(cs->as, pdpe_addr, pdpe); } } else #endif @@ -655,7 +655,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, pde |= PG_ACCESSED_MASK; if (is_dirty) pde |= PG_DIRTY_MASK; - stl_phys_notdirty(pde_addr, pde); + stl_phys_notdirty(cs->as, pde_addr, pde); } /* align to page_size */ pte = pde & ((PHYS_ADDR_MASK & ~(page_size - 1)) | 0xfff); @@ -664,7 +664,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, /* 4 KB page */ if (!(pde & PG_ACCESSED_MASK)) { pde |= PG_ACCESSED_MASK; - stl_phys_notdirty(pde_addr, pde); + stl_phys_notdirty(cs->as, pde_addr, pde); } pte_addr = ((pde & PHYS_ADDR_MASK) + (((addr >> 12) & 0x1ff) << 3)) & env->a20_mask; @@ -717,7 +717,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, pte |= PG_ACCESSED_MASK; if (is_dirty) pte |= PG_DIRTY_MASK; - stl_phys_notdirty(pte_addr, pte); + stl_phys_notdirty(cs->as, pte_addr, pte); } page_size = 4096; virt_addr = addr & ~0xfff; @@ -772,7 +772,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, pde |= PG_ACCESSED_MASK; if (is_dirty) pde |= PG_DIRTY_MASK; - stl_phys_notdirty(pde_addr, pde); + stl_phys_notdirty(cs->as, pde_addr, pde); } pte = pde & ~( (page_size - 1) & ~0xfff); /* align to page_size */ @@ -781,7 +781,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, } else { if (!(pde & PG_ACCESSED_MASK)) { pde |= PG_ACCESSED_MASK; - stl_phys_notdirty(pde_addr, pde); + stl_phys_notdirty(cs->as, pde_addr, pde); } /* page directory entry */ @@ -829,7 +829,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, pte |= PG_ACCESSED_MASK; if (is_dirty) pte |= PG_DIRTY_MASK; - stl_phys_notdirty(pte_addr, pte); + stl_phys_notdirty(cs->as, pte_addr, pte); } page_size = 4096; virt_addr = addr & ~0xfff; diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c index 46bb038..5fc2fd6 100644 --- a/target-sparc/mmu_helper.c +++ b/target-sparc/mmu_helper.c @@ -180,7 +180,7 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical, if (is_dirty) { pde |= PG_MODIFIED_MASK; } - stl_phys_notdirty(pde_ptr, pde); + stl_phys_notdirty(cs->as, pde_ptr, pde); } /* the page can be put in the TLB */