From patchwork Wed Dec 11 14:13:06 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 300220 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4060B2C00A4 for ; Thu, 12 Dec 2013 03:24:01 +1100 (EST) Received: from localhost ([::1]:58286 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqmZq-0001Pj-EQ for incoming@patchwork.ozlabs.org; Wed, 11 Dec 2013 11:23:58 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54064) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqmZ3-0000k0-72 for qemu-devel@nongnu.org; Wed, 11 Dec 2013 11:23:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VqmYv-0002mb-HF for qemu-devel@nongnu.org; Wed, 11 Dec 2013 11:23:09 -0500 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:47985) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqmYv-0002mR-Ba for qemu-devel@nongnu.org; Wed, 11 Dec 2013 11:23:01 -0500 Received: from 185dhcp207.pl.eso.org ([134.171.185.207] helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.2:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1VqmYu-0005PH-9T; Wed, 11 Dec 2013 17:23:00 +0100 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.80) (envelope-from ) id 1VqkXI-0001yM-Et; Wed, 11 Dec 2013 15:13:12 +0100 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Wed, 11 Dec 2013 15:13:06 +0100 Message-Id: <1386771186-7442-5-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1386771186-7442-1-git-send-email-aurelien@aurel32.net> References: <1386771186-7442-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:bc8:30d7:101::1 Cc: Paolo Bonzini , Aurelien Jarno , Richard Henderson Subject: [Qemu-devel] [PATCH v3 4/4] tcg/optimize: add known-zero bits compute for load ops X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Cc: Richard Henderson Cc: Paolo Bonzini Signed-off-by: Aurelien Jarno Reviewed-by: Richard Henderson --- tcg/optimize.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/tcg/optimize.c b/tcg/optimize.c index e14b564..db2b079 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -783,6 +783,39 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, mask = temps[args[3]].mask | temps[args[4]].mask; break; + CASE_OP_32_64(ld8u): + case INDEX_op_qemu_ld8u: + mask = 0xff; + break; + CASE_OP_32_64(ld16u): + case INDEX_op_qemu_ld16u: + mask = 0xffff; + break; + case INDEX_op_ld32u_i64: + case INDEX_op_qemu_ld32u: + mask = 0xffffffffu; + break; + + case INDEX_op_qemu_ld_i32: + case INDEX_op_qemu_ld_i64: + { + const TCGMemOp opc = args[def->nb_oargs + def->nb_iargs]; + if (!(opc & MO_SIGN)) { + switch (opc & MO_SIZE) { + case MO_8: + mask = 0xff; + break; + case MO_16: + mask = 0xffff; + break; + case MO_32: + mask = 0xffffffffu; + break; + } + } + } + break; + default: break; }