From patchwork Tue Dec 10 14:43:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 299605 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 5757E2C039A for ; Wed, 11 Dec 2013 10:01:19 +1100 (EST) Received: from localhost ([::1]:49545 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqOhT-0005WV-Sj for incoming@patchwork.ozlabs.org; Tue, 10 Dec 2013 09:54:15 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47730) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqOXN-0006hK-D9 for qemu-devel@nongnu.org; Tue, 10 Dec 2013 09:43:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VqOXL-0000Vr-Rc for qemu-devel@nongnu.org; Tue, 10 Dec 2013 09:43:49 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:43342) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqOXL-0000S5-Lo for qemu-devel@nongnu.org; Tue, 10 Dec 2013 09:43:47 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1VqOX8-0000dm-65; Tue, 10 Dec 2013 14:43:34 +0000 From: Peter Maydell To: Anthony Liguori Date: Tue, 10 Dec 2013 14:43:07 +0000 Message-Id: <1386686613-2390-12-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1386686613-2390-1-git-send-email-peter.maydell@linaro.org> References: <1386686613-2390-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: Blue Swirl , qemu-devel@nongnu.org, Aurelien Jarno Subject: [Qemu-devel] [PULL 11/37] target-arm: Allow secondary KVM CPUs to be booted via PSCI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org New ARM boards are generally expected to boot their secondary CPUs via the PSCI interface, rather than ad-hoc "loop around in holding pen code" as hw/arm/boot.c implements. In particular this is necessary for mach-virt kernels. For KVM we achieve this by creating the VCPUs with a feature flag marking them as starting in PSCI powered-down state; the guest kernel will then make a PSCI call (implemented in the host kernel) to start the secondaries at an address of its choosing once it has got the primary CPU up. Implement this setting of the feature flag, controlled by a qdev property for ARMCPU, which board code can set if it is a PSCI system. Signed-off-by: Peter Maydell Reviewed-by: Christoffer Dall Message-id: 1385140638-10444-7-git-send-email-peter.maydell@linaro.org --- target-arm/cpu-qom.h | 3 +++ target-arm/cpu.c | 7 +++++++ target-arm/kvm.c | 3 +++ 3 files changed, 13 insertions(+) diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index cbb9eec..8bd3e36 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -94,6 +94,9 @@ typedef struct ARMCPU { /* 'compatible' string for this CPU for Linux device trees */ const char *dtb_compatible; + /* Should CPU start in PSCI powered-off state? */ + bool start_powered_off; + /* The instance init functions for implementation-specific subclasses * set these fields to specify the implementation-dependent values of * various constant registers and reset values of non-constant diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 4c8d9c7..0325815 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -20,6 +20,7 @@ #include "cpu.h" #include "qemu-common.h" +#include "hw/qdev-properties.h" #if !defined(CONFIG_USER_ONLY) #include "hw/loader.h" #endif @@ -944,6 +945,11 @@ static const ARMCPUInfo arm_cpus[] = { #endif }; +static Property arm_cpu_properties[] = { + DEFINE_PROP_BOOL("start-powered-off", ARMCPU, start_powered_off, false), + DEFINE_PROP_END_OF_LIST() +}; + static void arm_cpu_class_init(ObjectClass *oc, void *data) { ARMCPUClass *acc = ARM_CPU_CLASS(oc); @@ -952,6 +958,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) acc->parent_realize = dc->realize; dc->realize = arm_cpu_realizefn; + dc->props = arm_cpu_properties; acc->parent_reset = cc->reset; cc->reset = arm_cpu_reset; diff --git a/target-arm/kvm.c b/target-arm/kvm.c index 3098456..80c58c5 100644 --- a/target-arm/kvm.c +++ b/target-arm/kvm.c @@ -79,6 +79,9 @@ int kvm_arch_init_vcpu(CPUState *cs) init.target = KVM_ARM_TARGET_CORTEX_A15; memset(init.features, 0, sizeof(init.features)); + if (cpu->start_powered_off) { + init.features[0] = 1 << KVM_ARM_VCPU_POWER_OFF; + } ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init); if (ret) { return ret;