From patchwork Fri Nov 29 20:42:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 295521 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 494252C00CA for ; Sat, 30 Nov 2013 07:43:41 +1100 (EST) Received: from localhost ([::1]:49374 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmUuY-0005WC-7t for incoming@patchwork.ozlabs.org; Fri, 29 Nov 2013 15:43:38 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43631) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmUty-0005Oo-2A for qemu-devel@nongnu.org; Fri, 29 Nov 2013 15:43:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VmUtt-0004YH-C3 for qemu-devel@nongnu.org; Fri, 29 Nov 2013 15:43:02 -0500 Received: from mail-qe0-x22d.google.com ([2607:f8b0:400d:c02::22d]:43751) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VmUtt-0004YC-5v for qemu-devel@nongnu.org; Fri, 29 Nov 2013 15:42:57 -0500 Received: by mail-qe0-f45.google.com with SMTP id 6so10668508qea.4 for ; Fri, 29 Nov 2013 12:42:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=gl0kXuu+w+UIRVhdXyWeBQeaamumckH4exnrGiCeLXU=; b=nVcFd/9YZwwBx7FspCbx9nW6Tv6TzA52clUYXchd3dG7ft3HyeeJ3BwJpY+iY1Qn1O uhEFEYewoVKtvt2ZlaNZtue4hy/BQlTx2eTYN6P/SWt396MT1gZBRmchY50xPu6HuA4I P5Y38efp2oVErJO6cOZettB5aag3dz3R+WOqnek4eK/XfX2tToEyi5aAOUXJv2+ykr7d 7FUcwxyOW+0U5zDl2rReHMDSXbasA9lWYYgdGS2Smk4Ig8VrDsEMwOJMCLt5e/neahAV DeJIqXVf7Dby+vTjOFFCRcFXjtD+KjQe7PWT6eVX5eAgz+sLP3+R9xPwBFMlXDpipLa1 8QaQ== X-Received: by 10.224.73.200 with SMTP id r8mr89573119qaj.72.1385757776336; Fri, 29 Nov 2013 12:42:56 -0800 (PST) Received: from pebble.twiddle.net.twiddle.net ([172.56.1.101]) by mx.google.com with ESMTPSA id a5sm65405613qae.2.2013.11.29.12.42.53 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Nov 2013 12:42:55 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 30 Nov 2013 09:42:30 +1300 Message-Id: <1385757754-10702-3-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1385757754-10702-1-git-send-email-rth@twiddle.net> References: <1385757754-10702-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c02::22d Cc: aliguori@amazon.com Subject: [Qemu-devel] [PULL 2/6] tcg-ppc64: Use qemu_getauxval X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Allow host detection on linux systems without glibc 2.16 or later. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- include/elf.h | 34 ++++++++++++++++++++++++++++++++++ tcg/ppc64/tcg-target.c | 11 ++--------- 2 files changed, 36 insertions(+), 9 deletions(-) diff --git a/include/elf.h b/include/elf.h index b818091..b68fc60 100644 --- a/include/elf.h +++ b/include/elf.h @@ -411,6 +411,40 @@ typedef struct { #define R_SPARC_5 44 #define R_SPARC_6 45 +/* Bits present in AT_HWCAP for PowerPC. */ + +#define PPC_FEATURE_32 0x80000000 +#define PPC_FEATURE_64 0x40000000 +#define PPC_FEATURE_601_INSTR 0x20000000 +#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 +#define PPC_FEATURE_HAS_FPU 0x08000000 +#define PPC_FEATURE_HAS_MMU 0x04000000 +#define PPC_FEATURE_HAS_4xxMAC 0x02000000 +#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 +#define PPC_FEATURE_HAS_SPE 0x00800000 +#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 +#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 +#define PPC_FEATURE_NO_TB 0x00100000 +#define PPC_FEATURE_POWER4 0x00080000 +#define PPC_FEATURE_POWER5 0x00040000 +#define PPC_FEATURE_POWER5_PLUS 0x00020000 +#define PPC_FEATURE_CELL 0x00010000 +#define PPC_FEATURE_BOOKE 0x00008000 +#define PPC_FEATURE_SMT 0x00004000 +#define PPC_FEATURE_ICACHE_SNOOP 0x00002000 +#define PPC_FEATURE_ARCH_2_05 0x00001000 +#define PPC_FEATURE_PA6T 0x00000800 +#define PPC_FEATURE_HAS_DFP 0x00000400 +#define PPC_FEATURE_POWER6_EXT 0x00000200 +#define PPC_FEATURE_ARCH_2_06 0x00000100 +#define PPC_FEATURE_HAS_VSX 0x00000080 + +#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \ + 0x00000040 + +#define PPC_FEATURE_TRUE_LE 0x00000002 +#define PPC_FEATURE_PPC_LE 0x00000001 + /* Bits present in AT_HWCAP, primarily for Sparc32. */ #define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 6109d86..06e440f 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -45,15 +45,10 @@ static uint8_t *tb_ret_addr; #define GUEST_BASE 0 #endif -#ifdef CONFIG_GETAUXVAL -#include +#include "elf.h" static bool have_isa_2_06; #define HAVE_ISA_2_06 have_isa_2_06 #define HAVE_ISEL have_isa_2_06 -#else -#define HAVE_ISA_2_06 0 -#define HAVE_ISEL 0 -#endif #ifdef CONFIG_USE_GUEST_BASE #define TCG_GUEST_BASE_REG 30 @@ -2132,12 +2127,10 @@ static const TCGTargetOpDef ppc_op_defs[] = { static void tcg_target_init(TCGContext *s) { -#ifdef CONFIG_GETAUXVAL - unsigned long hwcap = getauxval(AT_HWCAP); + unsigned long hwcap = qemu_getauxval(AT_HWCAP); if (hwcap & PPC_FEATURE_ARCH_2_06) { have_isa_2_06 = true; } -#endif tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff); tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);