From patchwork Thu Nov 21 02:38:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 292918 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EAA4E2C016A for ; Thu, 21 Nov 2013 13:41:06 +1100 (EST) Received: from localhost ([::1]:58104 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VjKCW-0005d2-AH for incoming@patchwork.ozlabs.org; Wed, 20 Nov 2013 21:41:04 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54523) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VjKBr-0005be-5J for qemu-devel@nongnu.org; Wed, 20 Nov 2013 21:40:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VjKBl-0003u7-6K for qemu-devel@nongnu.org; Wed, 20 Nov 2013 21:40:23 -0500 Received: from mx1.redhat.com ([209.132.183.28]:24773) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VjKBk-0003tI-Ua for qemu-devel@nongnu.org; Wed, 20 Nov 2013 21:40:17 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id rAL2e07H004559 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 20 Nov 2013 21:40:00 -0500 Received: from dell-pet610-01.lab.eng.brq.redhat.com (dell-pet610-01.lab.eng.brq.redhat.com [10.34.42.20]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id rAL2djFr031356; Wed, 20 Nov 2013 21:39:56 -0500 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Thu, 21 Nov 2013 03:38:22 +0100 Message-Id: <1385001528-12003-2-git-send-email-imammedo@redhat.com> In-Reply-To: <1385001528-12003-1-git-send-email-imammedo@redhat.com> References: <1385001528-12003-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: peter.maydell@linaro.org, stefanha@redhat.com, mst@redhat.com, chegu_vinod@hp.com, stefanb@linux.vnet.ibm.com, mjt@tls.msk.ru, mdroth@linux.vnet.ibm.com, armbru@redhat.com, vasilis.liaskovitis@profitbricks.com, quintela@redhat.com, kraxel@redhat.com, aliguori@amazon.com, hutao@cn.fujitsu.com, pbonzini@redhat.com, marcel.a@redhat.com, lcapitulino@redhat.com, afaerber@suse.de Subject: [Qemu-devel] [PATCH 01/27] acpi: factor out common pm_update_sci() into acpi core X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Igor Mammedov --- perhaps this patch sholud go before "piix4: add acpi pci hotplug support" so that there were no need in this rename in piix4_acpi_pci_hotplug() here. s/pm_update_sci/acpi_update_sci/ --- hw/acpi/core.c | 18 ++++++++++++++++++ hw/acpi/ich9.c | 23 ++--------------------- hw/acpi/piix4.c | 34 ++++++++++------------------------ include/hw/acpi/acpi.h | 8 ++++++++ 4 files changed, 38 insertions(+), 45 deletions(-) diff --git a/hw/acpi/core.c b/hw/acpi/core.c index 58308a3..8c0d48c 100644 --- a/hw/acpi/core.c +++ b/hw/acpi/core.c @@ -662,3 +662,21 @@ uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr) return val; } + +void acpi_update_sci(ACPIREGS *regs, qemu_irq irq, uint32_t gpe0_sts_mask) +{ + int sci_level, pm1a_sts; + + pm1a_sts = acpi_pm1_evt_get_sts(regs); + + sci_level = ((pm1a_sts & + regs->pm1.evt.en & ACPI_BITMASK_PM1_COMMON_ENABLED) != 0) || + ((regs->gpe.sts[0] & regs->gpe.en[0] & gpe0_sts_mask) != 0); + + qemu_set_irq(irq, sci_level); + + /* schedule a timer interruption if needed */ + acpi_pm_tmr_update(regs, + (regs->pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && + !(pm1a_sts & ACPI_BITMASK_TIMER_STATUS)); +} diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index 7e0429e..e59688b 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -44,29 +44,10 @@ do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0) #define ICH9_DEBUG(fmt, ...) do { } while (0) #endif -static void pm_update_sci(ICH9LPCPMRegs *pm) -{ - int sci_level, pm1a_sts; - - pm1a_sts = acpi_pm1_evt_get_sts(&pm->acpi_regs); - - sci_level = (((pm1a_sts & pm->acpi_regs.pm1.evt.en) & - (ACPI_BITMASK_RT_CLOCK_ENABLE | - ACPI_BITMASK_POWER_BUTTON_ENABLE | - ACPI_BITMASK_GLOBAL_LOCK_ENABLE | - ACPI_BITMASK_TIMER_ENABLE)) != 0); - qemu_set_irq(pm->irq, sci_level); - - /* schedule a timer interruption if needed */ - acpi_pm_tmr_update(&pm->acpi_regs, - (pm->acpi_regs.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && - !(pm1a_sts & ACPI_BITMASK_TIMER_STATUS)); -} - static void ich9_pm_update_sci_fn(ACPIREGS *regs) { ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs); - pm_update_sci(pm); + acpi_update_sci(&pm->acpi_regs, pm->irq, 0); } static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width) @@ -193,7 +174,7 @@ static void pm_reset(void *opaque) pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN; } - pm_update_sci(pm); + acpi_update_sci(&pm->acpi_regs, pm->irq, 0); } static void pm_powerdown_req(Notifier *n, void *opaque) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 0be385e..b6dfa71 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -117,29 +117,11 @@ static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, #define ACPI_ENABLE 0xf1 #define ACPI_DISABLE 0xf0 -static void pm_update_sci(PIIX4PMState *s) -{ - int sci_level, pmsts; - - pmsts = acpi_pm1_evt_get_sts(&s->ar); - sci_level = (((pmsts & s->ar.pm1.evt.en) & - (ACPI_BITMASK_RT_CLOCK_ENABLE | - ACPI_BITMASK_POWER_BUTTON_ENABLE | - ACPI_BITMASK_GLOBAL_LOCK_ENABLE | - ACPI_BITMASK_TIMER_ENABLE)) != 0) || - (((s->ar.gpe.sts[0] & s->ar.gpe.en[0]) & - (PIIX4_PCI_HOTPLUG_STATUS | PIIX4_CPU_HOTPLUG_STATUS)) != 0); - - qemu_set_irq(s->irq, sci_level); - /* schedule a timer interruption if needed */ - acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && - !(pmsts & ACPI_BITMASK_TIMER_STATUS)); -} - static void pm_tmr_timer(ACPIREGS *ar) { PIIX4PMState *s = container_of(ar, PIIX4PMState, ar); - pm_update_sci(s); + acpi_update_sci(&s->ar, s->irq, PIIX4_PCI_HOTPLUG_STATUS | + PIIX4_CPU_HOTPLUG_STATUS); } static void apm_ctrl_changed(uint32_t val, void *arg) @@ -429,7 +411,8 @@ static int piix4_acpi_pci_hotplug(DeviceState *qdev, PCIDevice *dev, } s->ar.gpe.sts[0] |= PIIX4_PCI_HOTPLUG_STATUS; - pm_update_sci(s); + acpi_update_sci(&s->ar, s->irq, PIIX4_PCI_HOTPLUG_STATUS | + PIIX4_CPU_HOTPLUG_STATUS); return 0; } @@ -629,7 +612,8 @@ static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val, PIIX4PMState *s = opaque; acpi_gpe_ioport_writeb(&s->ar, addr, val); - pm_update_sci(s); + acpi_update_sci(&s->ar, s->irq, PIIX4_PCI_HOTPLUG_STATUS | + PIIX4_CPU_HOTPLUG_STATUS); PIIX4_DPRINTF("gpe write %" HWADDR_PRIx " <== %" PRIu64 "\n", addr, val); } @@ -745,7 +729,8 @@ static void piix4_cpu_hotplug_req(PIIX4PMState *s, CPUState *cpu, } else { g->sts[cpu_id / 8] &= ~(1 << (cpu_id % 8)); } - pm_update_sci(s); + acpi_update_sci(&s->ar, s->irq, PIIX4_PCI_HOTPLUG_STATUS | + PIIX4_CPU_HOTPLUG_STATUS); } static void piix4_cpu_added_req(Notifier *n, void *opaque) @@ -823,7 +808,8 @@ static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, disable_device(s, slot); } - pm_update_sci(s); + acpi_update_sci(&s->ar, s->irq, PIIX4_PCI_HOTPLUG_STATUS | + PIIX4_CPU_HOTPLUG_STATUS); return 0; } diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h index 6bbcb17..c4ae7d7 100644 --- a/include/hw/acpi/acpi.h +++ b/include/hw/acpi/acpi.h @@ -69,6 +69,12 @@ #define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400 #define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000 /* ACPI 3.0 */ +#define ACPI_BITMASK_PM1_COMMON_ENABLED ( \ + ACPI_BITMASK_RT_CLOCK_ENABLE | \ + ACPI_BITMASK_POWER_BUTTON_ENABLE | \ + ACPI_BITMASK_GLOBAL_LOCK_ENABLE | \ + ACPI_BITMASK_TIMER_ENABLE) + /* PM1x_CNT */ #define ACPI_BITMASK_SCI_ENABLE 0x0001 #define ACPI_BITMASK_BUS_MASTER_RLD 0x0002 @@ -160,6 +166,8 @@ void acpi_gpe_reset(ACPIREGS *ar); void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val); uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr); +void acpi_update_sci(ACPIREGS *acpi_regs, qemu_irq irq, uint32_t gpe0_sts_mask); + /* acpi.c */ extern int acpi_enabled; extern char unsigned *acpi_tables;