From patchwork Tue Nov 5 07:55:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: zhao xiao qiang X-Patchwork-Id: 288412 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A2D302C012E for ; Tue, 5 Nov 2013 18:58:43 +1100 (EST) Received: from localhost ([::1]:53722 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VdbX7-0005yg-Lu for incoming@patchwork.ozlabs.org; Tue, 05 Nov 2013 02:58:41 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43498) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VdbVz-0004sM-15 for qemu-devel@nongnu.org; Tue, 05 Nov 2013 02:57:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VdbVr-0007eQ-FV for qemu-devel@nongnu.org; Tue, 05 Nov 2013 02:57:30 -0500 Received: from m12-12.163.com ([220.181.12.12]:45424) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VdbVq-0007cm-FV for qemu-devel@nongnu.org; Tue, 05 Nov 2013 02:57:23 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=Received:From:To:Cc:Subject:Date:Message-Id: In-Reply-To:References; bh=2J0CqH5z5n8WmGvNEJK7iVooT0EMRjiGmugjX SpoBo4=; b=dsqgrhtpjcMGrJ8MDr8glzj6FF3fOZh3BPsF3LNnJeRs5Z+fQ7h0W 64/5cNLx6b8kTyyplYfThnWJYMpARsodfzE5LWurd2368jR4v1c5LA6IQmgKBMsg TYbBzQpPagHA0+IEX/e/fWaYDJO9gUDQt2TgWbKJi5kcGlRuFZw6gs= Received: from localhost.localdomain (unknown [121.5.20.50]) by smtp8 (Coremail) with SMTP id DMCowECpY1hypHhSGMJbEw--.477S6; Tue, 05 Nov 2013 15:55:36 +0800 (CST) From: xiaoqiang zhao To: qemu-devel@nongnu.org Date: Tue, 5 Nov 2013 15:55:43 +0800 Message-Id: <1383638143-11812-5-git-send-email-zxq_yx_007@163.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1383638143-11812-1-git-send-email-zxq_yx_007@163.com> References: <1383638143-11812-1-git-send-email-zxq_yx_007@163.com> X-CM-TRANSID: DMCowECpY1hypHhSGMJbEw--.477S6 X-Coremail-Antispam: 1Uf129KBjvJXoW3Jr4xArWDtrWUKr13Xr13urg_yoW7ZF47pF y8XF15ArWUGF1kXrsrJF4DXFW5CanakryUG3WkC393Aas8Cry8Jrn0kw1SkFy5GrWkAF1q qry3K345A3yUJrJanT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jw3ktUUUUU= X-CM-SenderInfo: 520ts5t0bqili6rwjhhfrp/1tbiTBTMxlEAIWI1qQAAsc X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 220.181.12.12 Cc: xiaoqiang zhao , pbonzini@redhat.com, afaerber@suse.de, aliguori@amazon.com Subject: [Qemu-devel] [PATCH v2 4/4] ioapic: QOM'ify ioapic X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org changes: 1. use type constant for kvm_ioapic and ioapic 2. convert 'init' to QOM's 'realize' for ioapic and kvm_ioapic For QOM'ify, I move variable 'ioapic_no' from static to global. Then we can drop the 'instance_no' argument. Now, it's child that increase 'ioapic_no' counter. --- hw/i386/kvm/ioapic.c | 13 ++++++++----- hw/intc/ioapic.c | 19 +++++++++++++------ hw/intc/ioapic_common.c | 13 ++++++++++--- include/hw/i386/ioapic_internal.h | 3 ++- 4 files changed, 33 insertions(+), 15 deletions(-) diff --git a/hw/i386/kvm/ioapic.c b/hw/i386/kvm/ioapic.c index 772a712..fe5e5c7 100644 --- a/hw/i386/kvm/ioapic.c +++ b/hw/i386/kvm/ioapic.c @@ -15,6 +15,8 @@ #include "hw/i386/apic_internal.h" #include "sysemu/kvm.h" +#define TYPE_KVM_IOAPIC "kvm-ioapic" + /* PC Utility function */ void kvm_pc_setup_irq_routing(bool pci_enabled) { @@ -127,13 +129,14 @@ static void kvm_ioapic_set_irq(void *opaque, int irq, int level) apic_report_irq_delivered(delivered); } -static void kvm_ioapic_init(IOAPICCommonState *s, int instance_no) +static void kvm_ioapic_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(s); + IOAPICCommonState *s = IOAPIC_COMMON(dev); - memory_region_init_reservation(&s->io_memory, NULL, "kvm-ioapic", 0x1000); + memory_region_init_reservation(&s->io_memory, NULL, TYPE_KVM_IOAPIC, 0x1000); qdev_init_gpio_in(dev, kvm_ioapic_set_irq, IOAPIC_NUM_PINS); + } static Property kvm_ioapic_properties[] = { @@ -146,7 +149,7 @@ static void kvm_ioapic_class_init(ObjectClass *klass, void *data) IOAPICCommonClass *k = IOAPIC_COMMON_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - k->init = kvm_ioapic_init; + k->realize = kvm_ioapic_realize; k->pre_save = kvm_ioapic_get; k->post_load = kvm_ioapic_put; dc->reset = kvm_ioapic_reset; @@ -154,7 +157,7 @@ static void kvm_ioapic_class_init(ObjectClass *klass, void *data) } static const TypeInfo kvm_ioapic_info = { - .name = "kvm-ioapic", + .name = TYPE_KVM_IOAPIC, .parent = TYPE_IOAPIC_COMMON, .instance_size = sizeof(KVMIOAPICState), .class_init = kvm_ioapic_class_init, diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index 8842845..885f385 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -36,6 +36,10 @@ static IOAPICCommonState *ioapics[MAX_IOAPICS]; +#define TYPE_IOAPIC "ioapic" +/* global variable from ioapic_common.c */ +extern int ioapic_no; + static void ioapic_service(IOAPICCommonState *s) { uint8_t i; @@ -225,16 +229,19 @@ static const MemoryRegionOps ioapic_io_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static void ioapic_init(IOAPICCommonState *s, int instance_no) +static void ioapic_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(s); + IOAPICCommonState *s = IOAPIC_COMMON(dev); memory_region_init_io(&s->io_memory, OBJECT(s), &ioapic_io_ops, s, - "ioapic", 0x1000); + TYPE_IOAPIC, 0x1000); qdev_init_gpio_in(dev, ioapic_set_irq, IOAPIC_NUM_PINS); - ioapics[instance_no] = s; + ioapics[ioapic_no] = s; + + /* increase the counter */ + ioapic_no++; } static void ioapic_class_init(ObjectClass *klass, void *data) @@ -242,12 +249,12 @@ static void ioapic_class_init(ObjectClass *klass, void *data) IOAPICCommonClass *k = IOAPIC_COMMON_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - k->init = ioapic_init; + k->realize = ioapic_realize; dc->reset = ioapic_reset_common; } static const TypeInfo ioapic_info = { - .name = "ioapic", + .name = TYPE_IOAPIC, .parent = TYPE_IOAPIC_COMMON, .instance_size = sizeof(IOAPICCommonState), .class_init = ioapic_class_init, diff --git a/hw/intc/ioapic_common.c b/hw/intc/ioapic_common.c index e55c6d1..718b5c0 100644 --- a/hw/intc/ioapic_common.c +++ b/hw/intc/ioapic_common.c @@ -23,6 +23,14 @@ #include "hw/i386/ioapic_internal.h" #include "hw/sysbus.h" +/* ioapic_no count start from 0 to MAX_IOAPICS, + * remove as static variable from ioapic_common_init. + * now as a global variable, let child to increase the counter + * then we can drop the 'instance_no' argument + * and convert to our QOM's realize function + */ +int ioapic_no = 0; + void ioapic_reset_common(DeviceState *dev) { IOAPICCommonState *s = IOAPIC_COMMON(dev); @@ -61,7 +69,6 @@ static void ioapic_common_realize(DeviceState *dev, Error **errp) { IOAPICCommonState *s = IOAPIC_COMMON(dev); IOAPICCommonClass *info; - static int ioapic_no; if (ioapic_no >= MAX_IOAPICS) { error_setg(errp, "Only %d ioapics allowed", MAX_IOAPICS); @@ -69,10 +76,10 @@ static void ioapic_common_realize(DeviceState *dev, Error **errp) } info = IOAPIC_COMMON_GET_CLASS(s); - info->init(s, ioapic_no); + info->realize(dev, errp); sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->io_memory); - ioapic_no++; + } static const VMStateDescription vmstate_ioapic_common = { diff --git a/include/hw/i386/ioapic_internal.h b/include/hw/i386/ioapic_internal.h index 25576c8..cbe4744 100644 --- a/include/hw/i386/ioapic_internal.h +++ b/include/hw/i386/ioapic_internal.h @@ -83,7 +83,8 @@ typedef struct IOAPICCommonState IOAPICCommonState; typedef struct IOAPICCommonClass { SysBusDeviceClass parent_class; - void (*init)(IOAPICCommonState *s, int instance_no); + /* QOM realize */ + DeviceRealize realize; void (*pre_save)(IOAPICCommonState *s); void (*post_load)(IOAPICCommonState *s); } IOAPICCommonClass;