From patchwork Fri Nov 1 13:21:19 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Musta X-Patchwork-Id: 287823 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8FE182C00E2 for ; Sat, 2 Nov 2013 00:25:13 +1100 (EST) Received: from localhost ([::1]:38115 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VcEit-0004YQ-9w for incoming@patchwork.ozlabs.org; Fri, 01 Nov 2013 09:25:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52354) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VcEgM-0000v8-2Q for qemu-devel@nongnu.org; Fri, 01 Nov 2013 09:22:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VcEgD-0001qK-Hf for qemu-devel@nongnu.org; Fri, 01 Nov 2013 09:22:34 -0400 Received: from mail-qc0-x22e.google.com ([2607:f8b0:400d:c01::22e]:47649) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VcEgD-0001qC-DS; Fri, 01 Nov 2013 09:22:25 -0400 Received: by mail-qc0-f174.google.com with SMTP id v1so2398994qcw.5 for ; Fri, 01 Nov 2013 06:22:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=v0UH5idEpWEYMads+RflgbxlonBmH7oQiNE6kgoEHLY=; b=cHowFoGHM1oy1grZQXD+Kn/9CH8XzQ3NLnYKPsHWeUcLlmb3a7P07SJwCJuUsrY7kN 15GaM4jYbCvTQrBjx+tKQbvqJK3UMUemzV6rIs6j72eWEsmhaEwPnNI2+1p5//b9TTo7 /jaId4Na/4CBuFntE4ulneOV9ZB4vdnNle+FBioQms1gqm0ukremtD2S6ARp11YG5HO6 n/BcU/pA++MXvA+0cyvIrIU2WJRa6bM54eBpEkQnFQtsJo0Zkmeqi1P+ekYLpAPLy27z vWHmBj699BQ0E6HlT8A6T8dwXFCG503ny/MR20Fry6AZrt4sjowS2egym8Xkq1jsWUO1 Yjng== X-Received: by 10.224.67.66 with SMTP id q2mr1928863qai.122.1383312145037; Fri, 01 Nov 2013 06:22:25 -0700 (PDT) Received: from tmusta-sc.rchland.ibm.com (rchp4.rochester.ibm.com. [129.42.161.36]) by mx.google.com with ESMTPSA id 4sm20876174qak.11.2013.11.01.06.22.23 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 01 Nov 2013 06:22:24 -0700 (PDT) From: Tom Musta To: qemu-devel@nongnu.org, tommusta@gmail.com Date: Fri, 1 Nov 2013 08:21:19 -0500 Message-Id: <1383312083-2536-10-git-send-email-tommusta@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1383312083-2536-1-git-send-email-tommusta@gmail.com> References: <1383312083-2536-1-git-send-email-tommusta@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c01::22e Cc: qemu-ppc@nongnu.org Subject: [Qemu-devel] [PATCH V3 09/13] Add Power7 VSX Logical Instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch adds the VSX logical instructions that are defined by the Version 2.06 Power ISA (aka Power7): - xxland - xxlandc - xxlor - xxlxor - xxlnor Signed-off-by: Tom Musta --- target-ppc/translate.c | 29 +++++++++++++++++++++++++++++ 1 files changed, 29 insertions(+), 0 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index e7d40a4..ab78bf5 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7278,6 +7278,24 @@ VSX_VECTOR_MOVE(xvnegsp, OP_NEG, SGN_MASK_SP) VSX_VECTOR_MOVE(xvcpsgnsp, OP_CPSGN, SGN_MASK_SP) +#define VSX_LOGICAL(name, tcg_op) \ +static void glue(gen_, name)(DisasContext * ctx) \ + { \ + if (unlikely(!ctx->vsx_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VSXU); \ + return; \ + } \ + tcg_op(cpu_vsrh(xT(ctx->opcode)), cpu_vsrh(xA(ctx->opcode)), \ + cpu_vsrh(xB(ctx->opcode))); \ + tcg_op(cpu_vsrl(xT(ctx->opcode)), cpu_vsrl(xA(ctx->opcode)), \ + cpu_vsrl(xB(ctx->opcode))); \ + } + +VSX_LOGICAL(xxland, tcg_gen_and_tl) +VSX_LOGICAL(xxlandc, tcg_gen_andc_tl) +VSX_LOGICAL(xxlor, tcg_gen_or_tl) +VSX_LOGICAL(xxlxor, tcg_gen_xor_tl) +VSX_LOGICAL(xxlnor, tcg_gen_nor_tl) /*** SPE extension ***/ /* Register moves */ @@ -9781,6 +9799,17 @@ GEN_XX2FORM(xvabssp, 0x12, 0x19, PPC2_VSX), GEN_XX2FORM(xvnabssp, 0x12, 0x1A, PPC2_VSX), GEN_XX2FORM(xvnegsp, 0x12, 0x1B, PPC2_VSX), GEN_XX3FORM(xvcpsgnsp, 0x00, 0x1A, PPC2_VSX), + +#undef VSX_LOGICAL +#define VSX_LOGICAL(name, opc2, opc3, fl2) \ +GEN_XX3FORM(name, opc2, opc3, fl2) + +VSX_LOGICAL(xxland, 0x8, 0x10, PPC2_VSX), +VSX_LOGICAL(xxlandc, 0x8, 0x11, PPC2_VSX), +VSX_LOGICAL(xxlor, 0x8, 0x12, PPC2_VSX), +VSX_LOGICAL(xxlxor, 0x8, 0x13, PPC2_VSX), +VSX_LOGICAL(xxlnor, 0x8, 0x14, PPC2_VSX), + GEN_XX3FORM_DM(xxpermdi, 0x08, 0x01), #undef GEN_SPE