From patchwork Fri Sep 27 00:48:13 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 278341 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 86B762C032D for ; Fri, 27 Sep 2013 10:56:49 +1000 (EST) Received: from localhost ([::1]:60479 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VPMMR-0004m5-EM for incoming@patchwork.ozlabs.org; Thu, 26 Sep 2013 20:56:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38877) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VPMF2-0001NS-6G for qemu-devel@nongnu.org; Thu, 26 Sep 2013 20:49:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VPMEu-0004j2-Ob for qemu-devel@nongnu.org; Thu, 26 Sep 2013 20:49:08 -0400 Received: from cantor2.suse.de ([195.135.220.15]:52658 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VPMEu-0004i4-Hf for qemu-devel@nongnu.org; Thu, 26 Sep 2013 20:49:00 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 20027A5539; Fri, 27 Sep 2013 02:48:58 +0200 (CEST) From: Alexander Graf To: qemu-devel@nongnu.org Date: Fri, 27 Sep 2013 02:48:13 +0200 Message-Id: <1380242934-20953-20-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1380242934-20953-1-git-send-email-agraf@suse.de> References: <1380242934-20953-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Peter Maydell , Michael Matz , C Fontana , Dirk Mueller , Laurent Desnogues , Christoffer Dall , Richard Henderson Subject: [Qemu-devel] [PATCH 19/60] AArch64: Add ins GPR->Vec instruction emulation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch adds emulation for the INS instruction flavor that copies GPR contents into vector register parts. Signed-off-by: Alexander Graf --- target-arm/translate-a64.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index e29d5a8..546ca13 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -922,6 +922,42 @@ static void handle_umov(DisasContext *s, uint32_t insn) } } +static void handle_insg(DisasContext *s, uint32_t insn) +{ + int rd = get_bits(insn, 0, 5); + int rn = get_bits(insn, 5, 5); + int imm5 = get_bits(insn, 16, 6); + int freg_offs_d = offsetof(CPUARMState, vfp.regs[rd * 2]); + int size; + int idx; + + for (size = 0; !(imm5 & (1 << size)); size++) { + if (size > 3) { + unallocated_encoding(s); + return; + } + } + + switch (size) { + case 0: + idx = get_bits(imm5, 1, 4) << 0; + tcg_gen_st8_i64(cpu_reg(rn), cpu_env, freg_offs_d + idx); + break; + case 1: + idx = get_bits(imm5, 2, 3) << 1; + tcg_gen_st16_i64(cpu_reg(rn), cpu_env, freg_offs_d + idx); + break; + case 2: + idx = get_bits(imm5, 3, 2) << 2; + tcg_gen_st32_i64(cpu_reg(rn), cpu_env, freg_offs_d + idx); + break; + case 3: + idx = get_bits(imm5, 4, 1) << 3; + tcg_gen_st_i64(cpu_reg(rn), cpu_env, freg_offs_d + idx); + break; + } +} + void disas_a64_insn(CPUARMState *env, DisasContext *s) { uint32_t insn; @@ -987,6 +1023,9 @@ void disas_a64_insn(CPUARMState *env, DisasContext *s) } else if (!get_bits(insn, 31, 1) && !get_bits(insn, 29, 1) && (get_bits(insn, 10, 6) == 0xf)) { handle_umov(s, insn); + } else if ((get_bits(insn, 29, 3) == 2) && !get_bits(insn, 21, 3) && + (get_bits(insn, 10, 6) == 0x7)) { + handle_insg(s, insn); } else { unallocated_encoding(s); }