From patchwork Mon Sep 9 17:27:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 273625 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 776DC2C00A6 for ; Tue, 10 Sep 2013 03:30:25 +1000 (EST) Received: from localhost ([::1]:52945 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJ5I7-000891-IO for incoming@patchwork.ozlabs.org; Mon, 09 Sep 2013 13:30:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34708) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJ5G1-0004vb-8W for qemu-devel@nongnu.org; Mon, 09 Sep 2013 13:28:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VJ5Fu-0008TT-NF for qemu-devel@nongnu.org; Mon, 09 Sep 2013 13:28:13 -0400 Received: from hall.aurel32.net ([2001:470:1f0b:4a8::1]:38650) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJ5Fu-0008TJ-Fl for qemu-devel@nongnu.org; Mon, 09 Sep 2013 13:28:06 -0400 Received: from anguille.univ-lyon1.fr ([134.214.4.207] helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.2:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1VJ5Ft-0003kd-Ik; Mon, 09 Sep 2013 19:28:05 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.80) (envelope-from ) id 1VJ5Fn-0006ea-ND; Mon, 09 Sep 2013 19:27:59 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Mon, 9 Sep 2013 19:27:50 +0200 Message-Id: <1378747670-25512-5-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1378747670-25512-1-git-send-email-aurelien@aurel32.net> References: <1378747670-25512-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:470:1f0b:4a8::1 Cc: Paolo Bonzini , Aurelien Jarno , Richard Henderson Subject: [Qemu-devel] [PATCH v2 4/4] tcg/optimize: add known-zero bits compute for load ops X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Cc: Richard Henderson Cc: Paolo Bonzini Signed-off-by: Aurelien Jarno Reviewed-by: Richard Henderson --- tcg/optimize.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/tcg/optimize.c b/tcg/optimize.c index b1f736b..044f456 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -787,6 +787,19 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, mask = temps[args[3]].mask | temps[args[4]].mask; break; + CASE_OP_32_64(ld8u): + case INDEX_op_qemu_ld8u: + mask = 0xff; + break; + CASE_OP_32_64(ld16u): + case INDEX_op_qemu_ld16u: + mask = 0xffff; + break; + case INDEX_op_ld32u_i64: + case INDEX_op_qemu_ld32u: + mask = 0xffffffffu; + break; + default: break; }