From patchwork Wed Sep 4 09:04:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 272506 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id ED80B2C00A0 for ; Wed, 4 Sep 2013 19:14:45 +1000 (EST) Received: from localhost ([::1]:51263 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VH9Ah-0008Us-Vm for incoming@patchwork.ozlabs.org; Wed, 04 Sep 2013 05:14:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49609) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VH921-0004Rk-BR for qemu-devel@nongnu.org; Wed, 04 Sep 2013 05:05:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VH91u-0007t3-8v for qemu-devel@nongnu.org; Wed, 04 Sep 2013 05:05:45 -0400 Received: from cantor2.suse.de ([195.135.220.15]:45379 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VH91t-0007sk-TU for qemu-devel@nongnu.org; Wed, 04 Sep 2013 05:05:38 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 7DBBEA5388 for ; Wed, 4 Sep 2013 11:05:37 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Wed, 4 Sep 2013 11:04:45 +0200 Message-Id: <1378285521-3230-6-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1378285521-3230-1-git-send-email-afaerber@suse.de> References: <1378285521-3230-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [RFC qom-cpu 05/41] cpu: Move mem_io_{pc, vaddr} fields from CPU_COMMON to CPUState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Reset them. Signed-off-by: Andreas Färber --- exec.c | 4 ++-- hw/i386/kvmvapic.c | 2 +- include/exec/cpu-defs.h | 7 ------- include/exec/softmmu_template.h | 10 ++++++---- include/qom/cpu.h | 8 ++++++++ qom/cpu.c | 2 ++ target-i386/helper.c | 7 +++++-- translate-all.c | 15 ++++++++------- 8 files changed, 32 insertions(+), 23 deletions(-) diff --git a/exec.c b/exec.c index 4354eac..00c44ea 100644 --- a/exec.c +++ b/exec.c @@ -1459,7 +1459,7 @@ static void notdirty_mem_write(void *opaque, hwaddr ram_addr, flushed */ if (dirty_flags == 0xff) { CPUArchState *env = current_cpu->env_ptr; - tlb_set_dirty(env, env->mem_io_vaddr); + tlb_set_dirty(env, current_cpu->mem_io_vaddr); } } @@ -1493,7 +1493,7 @@ static void check_watchpoint(int offset, int len_mask, int flags) cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG); return; } - vaddr = (env->mem_io_vaddr & TARGET_PAGE_MASK) + offset; + vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset; QTAILQ_FOREACH(wp, &env->watchpoints, entry) { if ((vaddr == (wp->vaddr & len_mask) || (vaddr & wp->len_mask) == wp->vaddr) && (wp->flags & flags)) { diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index 7295e5b..01e1117 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -408,7 +408,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip) if (!kvm_enabled()) { CPUClass *cc = CPU_GET_CLASS(cs); - cpu_restore_state(env, env->mem_io_pc); + cpu_restore_state(env, cs->mem_io_pc); cc->get_tb_cpu_state(cs, ¤t_pc, ¤t_cs_base, ¤t_flags); } diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index a5c028c..d8e1af8 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -145,13 +145,6 @@ typedef struct CPUWatchpoint { #define CPU_TEMP_BUF_NLONGS 128 #define CPU_COMMON \ /* soft mmu support */ \ - /* in order to avoid passing too many arguments to the MMIO \ - helpers, we store some rarely used information in the CPU \ - context) */ \ - uintptr_t mem_io_pc; /* host pc at which the memory was \ - accessed */ \ - target_ulong mem_io_vaddr; /* target virtual addr at which the \ - memory was accessed */ \ CPU_COMMON_TLB \ struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \ \ diff --git a/include/exec/softmmu_template.h b/include/exec/softmmu_template.h index 5bbc56a..8b74d4f 100644 --- a/include/exec/softmmu_template.h +++ b/include/exec/softmmu_template.h @@ -75,16 +75,17 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env, target_ulong addr, uintptr_t retaddr) { + CPUState *cpu = ENV_GET_CPU(env); uint64_t val; MemoryRegion *mr = iotlb_to_region(physaddr); physaddr = (physaddr & TARGET_PAGE_MASK) + addr; - env->mem_io_pc = retaddr; + cpu->mem_io_pc = retaddr; if (mr != &io_mem_rom && mr != &io_mem_notdirty && !can_do_io(env)) { cpu_io_recompile(env, retaddr); } - env->mem_io_vaddr = addr; + cpu->mem_io_vaddr = addr; io_mem_read(mr, physaddr, &val, 1 << SHIFT); return val; } @@ -196,6 +197,7 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env, target_ulong addr, uintptr_t retaddr) { + CPUState *cpu = ENV_GET_CPU(env); MemoryRegion *mr = iotlb_to_region(physaddr); physaddr = (physaddr & TARGET_PAGE_MASK) + addr; @@ -203,8 +205,8 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env, cpu_io_recompile(env, retaddr); } - env->mem_io_vaddr = addr; - env->mem_io_pc = retaddr; + cpu->mem_io_vaddr = addr; + cpu->mem_io_pc = retaddr; io_mem_write(mr, physaddr, val, 1 << SHIFT); } diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 4d974f3..d79466a 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -166,6 +166,8 @@ struct kvm_run; * @gdb_num_regs: Number of total registers accessible to GDB. * @gdb_num_g_regs: Number of registers in GDB 'g' packets. * @next_cpu: Next CPU sharing TB cache. + * @mem_io_pc: Host Program Counter at which the memory was accessed. + * @mem_io_vaddr: Target virtual address at which the memory was accessed. * @kvm_fd: vCPU file descriptor for KVM. * * State of one CPU core or thread. @@ -204,6 +206,12 @@ struct CPUState { int gdb_num_g_regs; QTAILQ_ENTRY(CPUState) node; + /* In order to avoid passing too many arguments to the MMIO helpers, + * we store some rarely used information in the CPU context. + */ + uintptr_t mem_io_pc; + vaddr mem_io_vaddr; + int kvm_fd; bool kvm_vcpu_dirty; struct KVMState *kvm_state; diff --git a/qom/cpu.c b/qom/cpu.c index 9b9c2c6..bf3c913 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -198,6 +198,8 @@ static void cpu_common_reset(CPUState *cpu) cpu->interrupt_request = 0; cpu->current_tb = NULL; cpu->halted = 0; + cpu->mem_io_pc = 0; + cpu->mem_io_vaddr = 0; } static int cpu_common_mmu_index(const CPUState *cs) diff --git a/target-i386/helper.c b/target-i386/helper.c index b25dafc..8c2ad94 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1248,12 +1248,15 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank, void cpu_report_tpr_access(CPUX86State *env, TPRAccess access) { + X86CPU *cpu = x86_env_get_cpu(env); + CPUState *cs = CPU(cpu); + if (kvm_enabled()) { env->tpr_access_type = access; - cpu_interrupt(CPU(x86_env_get_cpu(env)), CPU_INTERRUPT_TPR); + cpu_interrupt(cs, CPU_INTERRUPT_TPR); } else { - cpu_restore_state(env, env->mem_io_pc); + cpu_restore_state(env, cs->mem_io_pc); apic_handle_tpr_access_report(env->apic_state, env->eip, access); } diff --git a/translate-all.c b/translate-all.c index 6000d4a..73ff1cf 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1062,9 +1062,9 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, if (current_tb_not_found) { current_tb_not_found = 0; current_tb = NULL; - if (env->mem_io_pc) { + if (cpu->mem_io_pc) { /* now we have a real cpu fault */ - current_tb = tb_find_pc(env->mem_io_pc); + current_tb = tb_find_pc(cpu->mem_io_pc); } } if (current_tb == tb && @@ -1076,7 +1076,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, restore the CPU state */ current_tb_modified = 1; - cpu_restore_state_from_tb(current_tb, env, env->mem_io_pc); + cpu_restore_state_from_tb(current_tb, env, cpu->mem_io_pc); cc->get_tb_cpu_state(cpu, ¤t_pc, ¤t_cs_base, ¤t_flags); } @@ -1103,7 +1103,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, if (!p->first_tb) { invalidate_page_bitmap(p); if (is_cpu_write_access) { - tlb_unprotect_code_phys(env, start, env->mem_io_vaddr); + tlb_unprotect_code_phys(env, start, cpu->mem_io_vaddr); } } #endif @@ -1389,14 +1389,15 @@ void tb_invalidate_phys_addr(hwaddr addr) void tb_check_watchpoint(CPUArchState *env) { + CPUState *cpu = ENV_GET_CPU(env); TranslationBlock *tb; - tb = tb_find_pc(env->mem_io_pc); + tb = tb_find_pc(cpu->mem_io_pc); if (!tb) { cpu_abort(env, "check_watchpoint: could not find TB for pc=%p", - (void *)env->mem_io_pc); + (void *)cpu->mem_io_pc); } - cpu_restore_state_from_tb(tb, env, env->mem_io_pc); + cpu_restore_state_from_tb(tb, env, cpu->mem_io_pc); tb_phys_invalidate(tb, -1); }