| Message ID | 1377692259-19959-1-git-send-email-aurelien@aurel32.net |
|---|---|
| State | New |
| Headers | show |
On Wed, Aug 28, 2013 at 02:17:39PM +0200, Aurelien Jarno wrote: > Now that the memory subsystem is propagating the endianness correctly, > the pcnet-pci device should have its I/O ports and MMIO memory marked > as LITTLE_ENDIAN, as PCI devices are little endian. > > This makes the pcnet-pci NIC to work again on big endian MIPS Malta > (default NIC). > > Cc: qemu-stable@nongnu.org > Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> > --- > hw/net/pcnet-pci.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
On Wed, Aug 28, 2013 at 02:17:39PM +0200, Aurelien Jarno wrote: > Now that the memory subsystem is propagating the endianness correctly, > the pcnet-pci device should have its I/O ports and MMIO memory marked > as LITTLE_ENDIAN, as PCI devices are little endian. > > This makes the pcnet-pci NIC to work again on big endian MIPS Malta > (default NIC). > > Cc: qemu-stable@nongnu.org > Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> > --- > hw/net/pcnet-pci.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Thanks, applied to my net-next tree: https://github.com/stefanha/qemu/commits/net-next Stefan
diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index a893165..865f2f0 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -134,7 +134,7 @@ static void pcnet_ioport_write(void *opaque, hwaddr addr, static const MemoryRegionOps pcnet_io_ops = { .read = pcnet_ioport_read, .write = pcnet_ioport_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void pcnet_mmio_writeb(void *opaque, hwaddr addr, uint32_t val) @@ -256,7 +256,7 @@ static const MemoryRegionOps pcnet_mmio_ops = { .read = { pcnet_mmio_readb, pcnet_mmio_readw, pcnet_mmio_readl }, .write = { pcnet_mmio_writeb, pcnet_mmio_writew, pcnet_mmio_writel }, }, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void pci_physical_memory_write(void *dma_opaque, hwaddr addr,
Now that the memory subsystem is propagating the endianness correctly, the pcnet-pci device should have its I/O ports and MMIO memory marked as LITTLE_ENDIAN, as PCI devices are little endian. This makes the pcnet-pci NIC to work again on big endian MIPS Malta (default NIC). Cc: qemu-stable@nongnu.org Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> --- hw/net/pcnet-pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)