From patchwork Mon Jul 29 19:19:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 262985 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 22DA42C00DD for ; Tue, 30 Jul 2013 06:05:09 +1000 (EST) Received: from localhost ([::1]:40855 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V3tgo-0005rQ-QX for incoming@patchwork.ozlabs.org; Mon, 29 Jul 2013 16:05:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56946) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V3t1N-0004bQ-UP for qemu-devel@nongnu.org; Mon, 29 Jul 2013 15:22:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V3t1E-0002hB-Ex for qemu-devel@nongnu.org; Mon, 29 Jul 2013 15:22:17 -0400 Received: from cantor2.suse.de ([195.135.220.15]:53456 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V3t1E-0002gi-1Q for qemu-devel@nongnu.org; Mon, 29 Jul 2013 15:22:08 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 8783AA52BF for ; Mon, 29 Jul 2013 21:22:07 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Mon, 29 Jul 2013 21:19:22 +0200 Message-Id: <1375125630-24869-106-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1375125630-24869-1-git-send-email-afaerber@suse.de> References: <1375125630-24869-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PULL 105/173] arm_l2x0: Rename l2x0_state to L2x0State X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Andreas Färber --- hw/misc/arm_l2x0.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/hw/misc/arm_l2x0.c b/hw/misc/arm_l2x0.c index 3d6acee..f3ce477 100644 --- a/hw/misc/arm_l2x0.c +++ b/hw/misc/arm_l2x0.c @@ -23,7 +23,7 @@ /* L2C-310 r3p2 */ #define CACHE_ID 0x410000c8 -typedef struct l2x0_state { +typedef struct L2x0State { SysBusDevice busdev; MemoryRegion iomem; uint32_t cache_type; @@ -33,19 +33,19 @@ typedef struct l2x0_state { uint32_t tag_ctrl; uint32_t filter_start; uint32_t filter_end; -} l2x0_state; +} L2x0State; static const VMStateDescription vmstate_l2x0 = { .name = "l2x0", .version_id = 1, .minimum_version_id = 1, .fields = (VMStateField[]) { - VMSTATE_UINT32(ctrl, l2x0_state), - VMSTATE_UINT32(aux_ctrl, l2x0_state), - VMSTATE_UINT32(data_ctrl, l2x0_state), - VMSTATE_UINT32(tag_ctrl, l2x0_state), - VMSTATE_UINT32(filter_start, l2x0_state), - VMSTATE_UINT32(filter_end, l2x0_state), + VMSTATE_UINT32(ctrl, L2x0State), + VMSTATE_UINT32(aux_ctrl, L2x0State), + VMSTATE_UINT32(data_ctrl, L2x0State), + VMSTATE_UINT32(tag_ctrl, L2x0State), + VMSTATE_UINT32(filter_start, L2x0State), + VMSTATE_UINT32(filter_end, L2x0State), VMSTATE_END_OF_LIST() } }; @@ -55,7 +55,7 @@ static uint64_t l2x0_priv_read(void *opaque, hwaddr offset, unsigned size) { uint32_t cache_data; - l2x0_state *s = (l2x0_state *)opaque; + L2x0State *s = (L2x0State *)opaque; offset &= 0xfff; if (offset >= 0x730 && offset < 0x800) { return 0; /* cache ops complete */ @@ -97,7 +97,7 @@ static uint64_t l2x0_priv_read(void *opaque, hwaddr offset, static void l2x0_priv_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { - l2x0_state *s = (l2x0_state *)opaque; + L2x0State *s = (L2x0State *)opaque; offset &= 0xfff; if (offset >= 0x730 && offset < 0x800) { /* ignore */ @@ -137,7 +137,7 @@ static void l2x0_priv_write(void *opaque, hwaddr offset, static void l2x0_priv_reset(DeviceState *dev) { - l2x0_state *s = DO_UPCAST(l2x0_state, busdev.qdev, dev); + L2x0State *s = DO_UPCAST(L2x0State, busdev.qdev, dev); s->ctrl = 0; s->aux_ctrl = 0x02020000; @@ -155,7 +155,7 @@ static const MemoryRegionOps l2x0_mem_ops = { static int l2x0_priv_init(SysBusDevice *dev) { - l2x0_state *s = FROM_SYSBUS(l2x0_state, dev); + L2x0State *s = FROM_SYSBUS(L2x0State, dev); memory_region_init_io(&s->iomem, OBJECT(dev), &l2x0_mem_ops, s, "l2x0_cc", 0x1000); @@ -164,7 +164,7 @@ static int l2x0_priv_init(SysBusDevice *dev) } static Property l2x0_properties[] = { - DEFINE_PROP_UINT32("cache-type", l2x0_state, cache_type, 0x1c100100), + DEFINE_PROP_UINT32("cache-type", L2x0State, cache_type, 0x1c100100), DEFINE_PROP_END_OF_LIST(), }; @@ -183,7 +183,7 @@ static void l2x0_class_init(ObjectClass *klass, void *data) static const TypeInfo l2x0_info = { .name = "l2x0", .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(l2x0_state), + .instance_size = sizeof(L2x0State), .class_init = l2x0_class_init, };