From patchwork Sun Jul 14 22:16:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 258912 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 679FA2C0106 for ; Mon, 15 Jul 2013 08:17:31 +1000 (EST) Received: from localhost ([::1]:43601 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyUbh-0003AB-5o for incoming@patchwork.ozlabs.org; Sun, 14 Jul 2013 18:17:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50197) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyUau-0002hD-KH for qemu-devel@nongnu.org; Sun, 14 Jul 2013 18:16:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UyUap-00058l-OW for qemu-devel@nongnu.org; Sun, 14 Jul 2013 18:16:40 -0400 Received: from mail-pb0-x22d.google.com ([2607:f8b0:400e:c01::22d]:38786) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyUap-00058e-EU for qemu-devel@nongnu.org; Sun, 14 Jul 2013 18:16:35 -0400 Received: by mail-pb0-f45.google.com with SMTP id mc8so10582656pbc.18 for ; Sun, 14 Jul 2013 15:16:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=0YRd3bbGtfwTzeODxa1lBGXIJqBqzWPV1ubV/GwXXUs=; b=naK0OOCV11yLte5tFfrY+FUdki1suq60QRE9hJ3yCXdW5wsHu22Jnmi3ZOfy0ahtC6 4PVHkbkSG1TsuXKvqBAfvJVK+ZFra4q96lhH9k74+a9DaePs3LfNkKbodJYD2TBQP1c5 tJybExsamTa1JZ9T9C2NYbo4hwNWRAFQ1xQCN1rxTfl3hrAQAeIIeThH+rt+hIJnjzQP HhDPyRpvtjfVqrSZepOvPdKYlKXwANgkFNWy8PHi/54jmPmjQDQ/6xJx5IRqkut1ESiT ZuTfGUoskQsDKRjdCLy/SX10TRsYqm5ySrQrweLr6s6223Dc6EL9RU1CmE542nCm6Yqa HHYw== X-Received: by 10.66.139.167 with SMTP id qz7mr51901370pab.157.1373840194729; Sun, 14 Jul 2013 15:16:34 -0700 (PDT) Received: from pebble.com ([216.239.55.194]) by mx.google.com with ESMTPSA id dg3sm57216706pbc.24.2013.07.14.15.16.32 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sun, 14 Jul 2013 15:16:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 14 Jul 2013 15:16:07 -0700 Message-Id: <1373840171-25556-2-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1373840171-25556-1-git-send-email-rth@twiddle.net> References: <1373840171-25556-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c01::22d Cc: aliguori@us.ibm.com, Richard Henderson Subject: [Qemu-devel] [PULL 1/5] hw/alpha: Don't use get_system_io X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Advancements in the ioport subsystem mean that we need no longer thunk memory-mapped i/o through the system-io address space. Signed-off-by: Richard Henderson --- hw/alpha/alpha_sys.h | 1 - hw/alpha/pci.c | 44 -------------------------------------------- hw/alpha/typhoon.c | 20 ++++++++------------ 3 files changed, 8 insertions(+), 57 deletions(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index 50e7730..0987851 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -14,7 +14,6 @@ PCIBus *typhoon_init(ram_addr_t, ISABus **, qemu_irq *, AlphaCPU *[4], pci_map_irq_fn); /* alpha_pci.c. */ -extern const MemoryRegionOps alpha_pci_bw_io_ops; extern const MemoryRegionOps alpha_pci_conf1_ops; extern const MemoryRegionOps alpha_pci_iack_ops; diff --git a/hw/alpha/pci.c b/hw/alpha/pci.c index 7327d48..25637e0 100644 --- a/hw/alpha/pci.c +++ b/hw/alpha/pci.c @@ -12,50 +12,6 @@ #include "sysemu/sysemu.h" -/* PCI IO reads/writes, to byte-word addressable memory. */ -/* ??? Doesn't handle multiple PCI busses. */ - -static uint64_t bw_io_read(void *opaque, hwaddr addr, unsigned size) -{ - switch (size) { - case 1: - return cpu_inb(addr); - case 2: - return cpu_inw(addr); - case 4: - return cpu_inl(addr); - } - abort(); -} - -static void bw_io_write(void *opaque, hwaddr addr, - uint64_t val, unsigned size) -{ - switch (size) { - case 1: - cpu_outb(addr, val); - break; - case 2: - cpu_outw(addr, val); - break; - case 4: - cpu_outl(addr, val); - break; - default: - abort(); - } -} - -const MemoryRegionOps alpha_pci_bw_io_ops = { - .read = bw_io_read, - .write = bw_io_write, - .endianness = DEVICE_LITTLE_ENDIAN, - .impl = { - .min_access_size = 1, - .max_access_size = 4, - }, -}; - /* PCI config space reads/writes, to byte-word addressable memory. */ static uint64_t bw_conf1_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 1c3ac8e..9dac9df 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -705,7 +705,6 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, const uint64_t MB = 1024 * 1024; const uint64_t GB = 1024 * MB; MemoryRegion *addr_space = get_system_memory(); - MemoryRegion *addr_space_io = get_system_io(); DeviceState *dev; TyphoonState *s; PCIHostState *phb; @@ -765,28 +764,25 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, &s->pchip.reg_mem); /* Pchip0 PCI I/O, 0x801.FC00.0000, 32MB. */ - /* ??? Ideally we drop the "system" i/o space on the floor and give the - PCI subsystem the full address space reserved by the chipset. - We can't do that until the MEM and IO paths in memory.c are unified. */ - memory_region_init_io(&s->pchip.reg_io, OBJECT(s), &alpha_pci_bw_io_ops, - NULL, "pci0-io", 32*MB); + memory_region_init(&s->pchip.reg_io, OBJECT(s), "pci0-io", 32*MB); memory_region_add_subregion(addr_space, 0x801fc000000ULL, &s->pchip.reg_io); b = pci_register_bus(dev, "pci", typhoon_set_irq, sys_map_irq, s, - &s->pchip.reg_mem, addr_space_io, 0, 64, TYPE_PCI_BUS); + &s->pchip.reg_mem, &s->pchip.reg_io, + 0, 64, TYPE_PCI_BUS); phb->bus = b; /* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */ - memory_region_init_io(&s->pchip.reg_iack, OBJECT(s), &alpha_pci_iack_ops, b, - "pci0-iack", 64*MB); + memory_region_init_io(&s->pchip.reg_iack, OBJECT(s), &alpha_pci_iack_ops, + b, "pci0-iack", 64*MB); memory_region_add_subregion(addr_space, 0x801f8000000ULL, &s->pchip.reg_iack); /* Pchip0 PCI configuration, 0x801.FE00.0000, 16MB. */ - memory_region_init_io(&s->pchip.reg_conf, OBJECT(s), &alpha_pci_conf1_ops, b, - "pci0-conf", 16*MB); + memory_region_init_io(&s->pchip.reg_conf, OBJECT(s), &alpha_pci_conf1_ops, + b, "pci0-conf", 16*MB); memory_region_add_subregion(addr_space, 0x801fe000000ULL, &s->pchip.reg_conf); @@ -804,7 +800,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, { qemu_irq isa_pci_irq, *isa_irqs; - *isa_bus = isa_bus_new(NULL, addr_space_io); + *isa_bus = isa_bus_new(NULL, &s->pchip.reg_io); isa_pci_irq = *qemu_allocate_irqs(typhoon_set_isa_irq, s, 1); isa_irqs = i8259_init(*isa_bus, isa_pci_irq); isa_bus_irqs(*isa_bus, isa_irqs);