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X-Received-From: 2a00:1450:400c:c00::234 Subject: [Qemu-devel] [PATCH 50/66] hw/p*: pass owner to memory_region_init* functions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Paolo Bonzini --- hw/pci-bridge/dec.c | 4 ++-- hw/pci-bridge/pci_bridge_dev.c | 2 +- hw/pci-host/apb.c | 12 ++++++------ hw/pci-host/bonito.c | 10 +++++----- hw/pci-host/grackle.c | 8 ++++---- hw/pci-host/piix.c | 13 +++++++------ hw/pci-host/ppce500.c | 12 ++++++------ hw/pci-host/prep.c | 8 ++++---- hw/pci-host/q35.c | 10 +++++----- hw/pci-host/uninorth.c | 24 ++++++++++++------------ hw/pci-host/versatile.c | 16 ++++++++-------- hw/pci/msix.c | 6 +++--- hw/pci/pci.c | 5 +++-- hw/pci/pci_bridge.c | 12 ++++++------ hw/pci/pcie_host.c | 3 ++- hw/pci/shpc.c | 4 ++-- hw/ppc/e500.c | 2 +- hw/ppc/mpc8544_guts.c | 2 +- hw/ppc/ppc4xx_pci.c | 8 ++++---- hw/ppc/ppce500_spin.c | 4 ++-- hw/ppc/spapr_pci.c | 12 +++++++----- 21 files changed, 91 insertions(+), 86 deletions(-) diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c index 3e84473..efc07c4 100644 --- a/hw/pci-bridge/dec.c +++ b/hw/pci-bridge/dec.c @@ -98,9 +98,9 @@ static int pci_dec_21154_device_init(SysBusDevice *dev) phb = PCI_HOST_BRIDGE(dev); - memory_region_init_io(&phb->conf_mem, NULL, &pci_host_conf_le_ops, + memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops, dev, "pci-conf-idx", 0x1000); - memory_region_init_io(&phb->data_mem, NULL, &pci_host_data_le_ops, + memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops, dev, "pci-data-idx", 0x1000); sysbus_init_mmio(dev, &phb->conf_mem); sysbus_init_mmio(dev, &phb->data_mem); diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index c2660f1..5f11323 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -46,7 +46,7 @@ static int pci_bridge_dev_initfn(PCIDevice *dev) if (err) { goto bridge_error; } - memory_region_init(&bridge_dev->bar, NULL, "shpc-bar", shpc_bar_size(dev)); + memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar", shpc_bar_size(dev)); err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0); if (err) { goto shpc_error; diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c index 7a8ce25..06ace08 100644 --- a/hw/pci-host/apb.c +++ b/hw/pci-host/apb.c @@ -447,7 +447,7 @@ PCIBus *pci_apb_init(hwaddr special_base, sysbus_mmio_map(s, 2, special_base + 0x2000000ULL); d = FROM_SYSBUS(APBState, s); - memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL); + memory_region_init(&d->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL); memory_region_add_subregion(get_system_memory(), mem_base, &d->pci_mmio); d->bus = pci_register_bus(&d->busdev.qdev, "pci", @@ -525,18 +525,18 @@ static int pci_pbm_init_device(SysBusDevice *dev) s->pci_irq_in = 0ULL; /* apb_config */ - memory_region_init_io(&s->apb_config, NULL, &apb_config_ops, s, "apb-config", - 0x10000); + memory_region_init_io(&s->apb_config, OBJECT(s), &apb_config_ops, s, + "apb-config", 0x10000); /* at region 0 */ sysbus_init_mmio(dev, &s->apb_config); - memory_region_init_io(&s->pci_config, NULL, &pci_config_ops, s, "apb-pci-config", - 0x1000000); + memory_region_init_io(&s->pci_config, OBJECT(s), &pci_config_ops, s, + "apb-pci-config", 0x1000000); /* at region 1 */ sysbus_init_mmio(dev, &s->pci_config); /* pci_ioport */ - memory_region_init_io(&s->pci_ioport, NULL, &pci_ioport_ops, s, + memory_region_init_io(&s->pci_ioport, OBJECT(s), &pci_ioport_ops, s, "apb-pci-ioport", 0x10000); /* at region 2 */ sysbus_init_mmio(dev, &s->pci_ioport); diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index ae00775..592d666 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -722,29 +722,29 @@ static int bonito_initfn(PCIDevice *dev) pci_config_set_prog_interface(dev->config, 0x00); /* set the north bridge register mapping */ - memory_region_init_io(&s->iomem, NULL, &bonito_ops, s, + memory_region_init_io(&s->iomem, OBJECT(s), &bonito_ops, s, "north-bridge-register", BONITO_INTERNAL_REG_SIZE); sysbus_init_mmio(sysbus, &s->iomem); sysbus_mmio_map(sysbus, 0, BONITO_INTERNAL_REG_BASE); /* set the north bridge pci configure mapping */ - memory_region_init_io(&phb->conf_mem, NULL, &bonito_pciconf_ops, s, + memory_region_init_io(&phb->conf_mem, OBJECT(s), &bonito_pciconf_ops, s, "north-bridge-pci-config", BONITO_PCICONFIG_SIZE); sysbus_init_mmio(sysbus, &phb->conf_mem); sysbus_mmio_map(sysbus, 1, BONITO_PCICONFIG_BASE); /* set the south bridge pci configure mapping */ - memory_region_init_io(&phb->data_mem, NULL, &bonito_spciconf_ops, s, + memory_region_init_io(&phb->data_mem, OBJECT(s), &bonito_spciconf_ops, s, "south-bridge-pci-config", BONITO_SPCICONFIG_SIZE); sysbus_init_mmio(sysbus, &phb->data_mem); sysbus_mmio_map(sysbus, 2, BONITO_SPCICONFIG_BASE); - memory_region_init_io(&s->iomem_ldma, NULL, &bonito_ldma_ops, s, + memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s, "ldma", 0x100); sysbus_init_mmio(sysbus, &s->iomem_ldma); sysbus_mmio_map(sysbus, 3, 0xbfe00200); - memory_region_init_io(&s->iomem_cop, NULL, &bonito_cop_ops, s, + memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s, "cop", 0x100); sysbus_init_mmio(sysbus, &s->iomem_cop); sysbus_mmio_map(sysbus, 4, 0xbfe00300); diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index da0fedb..4991ec4 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -76,8 +76,8 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic, phb = PCI_HOST_BRIDGE(dev); d = GRACKLE_PCI_HOST_BRIDGE(dev); - memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL); - memory_region_init_alias(&d->pci_hole, NULL, "pci-hole", &d->pci_mmio, + memory_region_init(&d->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL); + memory_region_init_alias(&d->pci_hole, OBJECT(s), "pci-hole", &d->pci_mmio, 0x80000000ULL, 0x7e000000ULL); memory_region_add_subregion(address_space_mem, 0x80000000ULL, &d->pci_hole); @@ -104,9 +104,9 @@ static int pci_grackle_init_device(SysBusDevice *dev) phb = PCI_HOST_BRIDGE(dev); - memory_region_init_io(&phb->conf_mem, NULL, &pci_host_conf_le_ops, + memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops, dev, "pci-conf-idx", 0x1000); - memory_region_init_io(&phb->data_mem, NULL, &pci_host_data_le_ops, + memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops, dev, "pci-data-idx", 0x1000); sysbus_init_mmio(dev, &phb->conf_mem); sysbus_init_mmio(dev, &phb->data_mem); diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index e179912..2ab1599 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -201,12 +201,12 @@ static int i440fx_pcihost_initfn(SysBusDevice *dev) { PCIHostState *s = PCI_HOST_BRIDGE(dev); - memory_region_init_io(&s->conf_mem, NULL, &pci_host_conf_le_ops, s, + memory_region_init_io(&s->conf_mem, OBJECT(dev), &pci_host_conf_le_ops, s, "pci-conf-idx", 4); sysbus_add_io(dev, 0xcf8, &s->conf_mem); sysbus_init_ioports(&s->busdev, 0xcf8, 4); - memory_region_init_io(&s->data_mem, NULL, &pci_host_data_le_ops, s, + memory_region_init_io(&s->data_mem, OBJECT(dev), &pci_host_data_le_ops, s, "pci-conf-data", 4); sysbus_add_io(dev, 0xcfc, &s->data_mem); sysbus_init_ioports(&s->busdev, 0xcfc, 4); @@ -260,17 +260,17 @@ static PCIBus *i440fx_common_init(const char *device_name, f->system_memory = address_space_mem; f->pci_address_space = pci_address_space; f->ram_memory = ram_memory; - memory_region_init_alias(&f->pci_hole, NULL, "pci-hole", f->pci_address_space, + memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space, pci_hole_start, pci_hole_size); memory_region_add_subregion(f->system_memory, pci_hole_start, &f->pci_hole); - memory_region_init_alias(&f->pci_hole_64bit, NULL, "pci-hole64", + memory_region_init_alias(&f->pci_hole_64bit, OBJECT(d), "pci-hole64", f->pci_address_space, pci_hole64_start, pci_hole64_size); if (pci_hole64_size) { memory_region_add_subregion(f->system_memory, pci_hole64_start, &f->pci_hole_64bit); } - memory_region_init_alias(&f->smram_region, NULL, "smram-region", + memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-region", f->pci_address_space, 0xa0000, 0x20000); memory_region_add_subregion_overlap(f->system_memory, 0xa0000, &f->smram_region, 1); @@ -549,7 +549,8 @@ static int piix3_initfn(PCIDevice *dev) isa_bus_new(DEVICE(d), pci_address_space_io(dev)); - memory_region_init_io(&d->rcr_mem, NULL, &rcr_ops, d, "piix3-reset-control", 1); + memory_region_init_io(&d->rcr_mem, OBJECT(dev), &rcr_ops, d, + "piix3-reset-control", 1); memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT, &d->rcr_mem, 1); diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index 7d8c59b..646204e 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -330,7 +330,7 @@ static int e500_pcihost_bridge_initfn(PCIDevice *d) (d->config[PCI_HEADER_TYPE] & PCI_HEADER_TYPE_MULTI_FUNCTION) | PCI_HEADER_TYPE_BRIDGE; - memory_region_init_alias(&b->bar0, NULL, "e500-pci-bar0", &ccsr->ccsr_space, + memory_region_init_alias(&b->bar0, OBJECT(ccsr), "e500-pci-bar0", &ccsr->ccsr_space, 0, int128_get64(ccsr->ccsr_space.size)); pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &b->bar0); @@ -352,7 +352,7 @@ static int e500_pcihost_initfn(SysBusDevice *dev) sysbus_init_irq(dev, &s->irq[i]); } - memory_region_init(&s->pio, NULL, "pci-pio", PCIE500_PCI_IOLEN); + memory_region_init(&s->pio, OBJECT(s), "pci-pio", PCIE500_PCI_IOLEN); b = pci_register_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq, mpc85xx_pci_map_irq, s->irq, address_space_mem, @@ -361,12 +361,12 @@ static int e500_pcihost_initfn(SysBusDevice *dev) pci_create_simple(b, 0, "e500-host-bridge"); - memory_region_init(&s->container, NULL, "pci-container", PCIE500_ALL_SIZE); - memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_be_ops, h, + memory_region_init(&s->container, OBJECT(h), "pci-container", PCIE500_ALL_SIZE); + memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_be_ops, h, "pci-conf-idx", 4); - memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops, h, + memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, h, "pci-conf-data", 4); - memory_region_init_io(&s->iomem, NULL, &e500_pci_reg_ops, s, + memory_region_init_io(&s->iomem, OBJECT(s), &e500_pci_reg_ops, s, "pci.reg", PCIE500_REG_SIZE); memory_region_add_subregion(&s->container, PCIE500_CFGADDR, &h->conf_mem); memory_region_add_subregion(&s->container, PCIE500_CFGDATA, &h->data_mem); diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 024cd51..b41d564 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -125,20 +125,20 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp) pci_bus_irqs(&s->pci_bus, prep_set_irq, prep_map_irq, s->irq, 4); - memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_be_ops, s, + memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_be_ops, s, "pci-conf-idx", 1); sysbus_add_io(dev, 0xcf8, &h->conf_mem); sysbus_init_ioports(&h->busdev, 0xcf8, 1); - memory_region_init_io(&h->data_mem, NULL, &pci_host_data_be_ops, s, + memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_be_ops, s, "pci-conf-data", 1); sysbus_add_io(dev, 0xcfc, &h->data_mem); sysbus_init_ioports(&h->busdev, 0xcfc, 1); - memory_region_init_io(&h->mmcfg, NULL, &PPC_PCIIO_ops, s, "pciio", 0x00400000); + memory_region_init_io(&h->mmcfg, OBJECT(s), &PPC_PCIIO_ops, s, "pciio", 0x00400000); memory_region_add_subregion(address_space_mem, 0x80800000, &h->mmcfg); - memory_region_init_io(&s->intack, NULL, &PPC_intack_ops, s, "pci-intack", 1); + memory_region_init_io(&s->intack, OBJECT(s), &PPC_intack_ops, s, "pci-intack", 1); memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->intack); /* TODO Remove once realize propagates to child devices. */ diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 49ccf80..5661ace 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -40,12 +40,12 @@ static int q35_host_init(SysBusDevice *dev) PCIHostState *pci = FROM_SYSBUS(PCIHostState, dev); Q35PCIHost *s = Q35_HOST_DEVICE(&dev->qdev); - memory_region_init_io(&pci->conf_mem, NULL, &pci_host_conf_le_ops, pci, + memory_region_init_io(&pci->conf_mem, OBJECT(pci), &pci_host_conf_le_ops, pci, "pci-conf-idx", 4); sysbus_add_io(dev, MCH_HOST_BRIDGE_CONFIG_ADDR, &pci->conf_mem); sysbus_init_ioports(&pci->busdev, MCH_HOST_BRIDGE_CONFIG_ADDR, 4); - memory_region_init_io(&pci->data_mem, NULL, &pci_host_data_le_ops, pci, + memory_region_init_io(&pci->data_mem, OBJECT(pci), &pci_host_data_le_ops, pci, "pci-conf-data", 4); sysbus_add_io(dev, MCH_HOST_BRIDGE_CONFIG_DATA, &pci->data_mem); sysbus_init_ioports(&pci->busdev, MCH_HOST_BRIDGE_CONFIG_DATA, 4); @@ -245,7 +245,7 @@ static int mch_init(PCIDevice *d) MCHPCIState *mch = MCH_PCI_DEVICE(d); /* setup pci memory regions */ - memory_region_init_alias(&mch->pci_hole, NULL, "pci-hole", + memory_region_init_alias(&mch->pci_hole, OBJECT(mch), "pci-hole", mch->pci_address_space, mch->below_4g_mem_size, 0x100000000ULL - mch->below_4g_mem_size); @@ -253,7 +253,7 @@ static int mch_init(PCIDevice *d) &mch->pci_hole); pci_hole64_size = (sizeof(hwaddr) == 4 ? 0 : ((uint64_t)1 << 62)); - memory_region_init_alias(&mch->pci_hole_64bit, NULL, "pci-hole64", + memory_region_init_alias(&mch->pci_hole_64bit, OBJECT(mch), "pci-hole64", mch->pci_address_space, 0x100000000ULL + mch->above_4g_mem_size, pci_hole64_size); @@ -264,7 +264,7 @@ static int mch_init(PCIDevice *d) } /* smram */ cpu_smm_register(&mch_set_smm, mch); - memory_region_init_alias(&mch->smram_region, NULL, "smram-region", + memory_region_init_alias(&mch->smram_region, OBJECT(mch), "smram-region", mch->pci_address_space, 0xa0000, 0x20000); memory_region_add_subregion_overlap(mch->system_memory, 0xa0000, &mch->smram_region, 1); diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index b72659d..91530cd 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -152,9 +152,9 @@ static int pci_unin_main_init_device(SysBusDevice *dev) /* Uninorth main bus */ h = PCI_HOST_BRIDGE(dev); - memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops, + memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, dev, "pci-conf-idx", 0x1000); - memory_region_init_io(&h->data_mem, NULL, &unin_data_ops, dev, + memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev, "pci-conf-data", 0x1000); sysbus_init_mmio(dev, &h->conf_mem); sysbus_init_mmio(dev, &h->data_mem); @@ -170,9 +170,9 @@ static int pci_u3_agp_init_device(SysBusDevice *dev) /* Uninorth U3 AGP bus */ h = PCI_HOST_BRIDGE(dev); - memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops, + memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, dev, "pci-conf-idx", 0x1000); - memory_region_init_io(&h->data_mem, NULL, &unin_data_ops, dev, + memory_region_init_io(&h->data_mem, OBJECT(h), &unin_data_ops, dev, "pci-conf-data", 0x1000); sysbus_init_mmio(dev, &h->conf_mem); sysbus_init_mmio(dev, &h->data_mem); @@ -187,9 +187,9 @@ static int pci_unin_agp_init_device(SysBusDevice *dev) /* Uninorth AGP bus */ h = PCI_HOST_BRIDGE(dev); - memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops, + memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, dev, "pci-conf-idx", 0x1000); - memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops, + memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, dev, "pci-conf-data", 0x1000); sysbus_init_mmio(dev, &h->conf_mem); sysbus_init_mmio(dev, &h->data_mem); @@ -203,9 +203,9 @@ static int pci_unin_internal_init_device(SysBusDevice *dev) /* Uninorth internal bus */ h = PCI_HOST_BRIDGE(dev); - memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops, + memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, dev, "pci-conf-idx", 0x1000); - memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops, + memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, dev, "pci-conf-data", 0x1000); sysbus_init_mmio(dev, &h->conf_mem); sysbus_init_mmio(dev, &h->data_mem); @@ -228,8 +228,8 @@ PCIBus *pci_pmac_init(qemu_irq *pic, s = SYS_BUS_DEVICE(dev); h = PCI_HOST_BRIDGE(s); d = UNI_NORTH_PCI_HOST_BRIDGE(dev); - memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL); - memory_region_init_alias(&d->pci_hole, NULL, "pci-hole", &d->pci_mmio, + memory_region_init(&d->pci_mmio, OBJECT(d), "pci-mmio", 0x100000000ULL); + memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio, 0x80000000ULL, 0x70000000ULL); memory_region_add_subregion(address_space_mem, 0x80000000ULL, &d->pci_hole); @@ -294,8 +294,8 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic, h = PCI_HOST_BRIDGE(dev); d = U3_AGP_HOST_BRIDGE(dev); - memory_region_init(&d->pci_mmio, NULL, "pci-mmio", 0x100000000ULL); - memory_region_init_alias(&d->pci_hole, NULL, "pci-hole", &d->pci_mmio, + memory_region_init(&d->pci_mmio, OBJECT(d), "pci-mmio", 0x100000000ULL); + memory_region_init_alias(&d->pci_hole, OBJECT(d), "pci-hole", &d->pci_mmio, 0x80000000ULL, 0x70000000ULL); memory_region_add_subregion(address_space_mem, 0x80000000ULL, &d->pci_hole); diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index f7df274..9238d39 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -381,8 +381,8 @@ static void pci_vpb_init(Object *obj) PCIHostState *h = PCI_HOST_BRIDGE(obj); PCIVPBState *s = PCI_VPB(obj); - memory_region_init(&s->pci_io_space, NULL, "pci_io", 1ULL << 32); - memory_region_init(&s->pci_mem_space, NULL, "pci_mem", 1ULL << 32); + memory_region_init(&s->pci_io_space, OBJECT(s), "pci_io", 1ULL << 32); + memory_region_init(&s->pci_mem_space, OBJECT(s), "pci_mem", 1ULL << 32); pci_bus_new_inplace(&s->pci_bus, DEVICE(obj), "pci", &s->pci_mem_space, &s->pci_io_space, @@ -424,20 +424,20 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp) * 3 : PCI IO window * 4..6 : PCI memory windows */ - memory_region_init_io(&s->controlregs, NULL, &pci_vpb_reg_ops, s, "pci-vpb-regs", - 0x1000); + memory_region_init_io(&s->controlregs, OBJECT(s), &pci_vpb_reg_ops, s, + "pci-vpb-regs", 0x1000); sysbus_init_mmio(sbd, &s->controlregs); - memory_region_init_io(&s->mem_config, NULL, &pci_vpb_config_ops, s, + memory_region_init_io(&s->mem_config, OBJECT(s), &pci_vpb_config_ops, s, "pci-vpb-selfconfig", 0x1000000); sysbus_init_mmio(sbd, &s->mem_config); - memory_region_init_io(&s->mem_config2, NULL, &pci_vpb_config_ops, s, + memory_region_init_io(&s->mem_config2, OBJECT(s), &pci_vpb_config_ops, s, "pci-vpb-config", 0x1000000); sysbus_init_mmio(sbd, &s->mem_config2); /* The window into I/O space is always into a fixed base address; * its size is the same for both realview and versatile. */ - memory_region_init_alias(&s->pci_io_window, NULL, "pci-vbp-io-window", + memory_region_init_alias(&s->pci_io_window, OBJECT(s), "pci-vbp-io-window", &s->pci_io_space, 0, 0x100000); sysbus_init_mmio(sbd, &s->pci_io_space); @@ -447,7 +447,7 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp) * offsets are guest controllable via the IMAP registers. */ for (i = 0; i < 3; i++) { - memory_region_init_alias(&s->pci_mem_window[i], NULL, "pci-vbp-window", + memory_region_init_alias(&s->pci_mem_window[i], OBJECT(s), "pci-vbp-window", &s->pci_mem_space, 0, s->mem_win_size[i]); sysbus_init_mmio(sbd, &s->pci_mem_window[i]); } diff --git a/hw/pci/msix.c b/hw/pci/msix.c index 83dfc7a..3430770 100644 --- a/hw/pci/msix.c +++ b/hw/pci/msix.c @@ -280,10 +280,10 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries, msix_mask_all(dev, nentries); - memory_region_init_io(&dev->msix_table_mmio, NULL, &msix_table_mmio_ops, dev, + memory_region_init_io(&dev->msix_table_mmio, OBJECT(dev), &msix_table_mmio_ops, dev, "msix-table", table_size); memory_region_add_subregion(table_bar, table_offset, &dev->msix_table_mmio); - memory_region_init_io(&dev->msix_pba_mmio, NULL, &msix_pba_mmio_ops, dev, + memory_region_init_io(&dev->msix_pba_mmio, OBJECT(dev), &msix_pba_mmio_ops, dev, "msix-pba", pba_size); memory_region_add_subregion(pba_bar, pba_offset, &dev->msix_pba_mmio); @@ -311,7 +311,7 @@ int msix_init_exclusive_bar(PCIDevice *dev, unsigned short nentries, } name = g_strdup_printf("%s-msix", dev->name); - memory_region_init(&dev->msix_exclusive_bar, NULL, name, MSIX_EXCLUSIVE_BAR_SIZE); + memory_region_init(&dev->msix_exclusive_bar, OBJECT(dev), name, MSIX_EXCLUSIVE_BAR_SIZE); g_free(name); ret = msix_init(dev, nentries, &dev->msix_exclusive_bar, bar_nr, diff --git a/hw/pci/pci.c b/hw/pci/pci.c index a29a385..ceb6a5d 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -811,7 +811,8 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus, dma_as = &address_space_memory; } - memory_region_init_alias(&pci_dev->bus_master_enable_region, NULL, "bus master", + memory_region_init_alias(&pci_dev->bus_master_enable_region, + OBJECT(pci_dev), "bus master", dma_as->root, 0, memory_region_size(dma_as->root)); memory_region_set_enabled(&pci_dev->bus_master_enable_region, false); address_space_init(&pci_dev->bus_master_as, &pci_dev->bus_master_enable_region, @@ -1945,7 +1946,7 @@ static int pci_add_option_rom(PCIDevice *pdev, bool is_default_rom) snprintf(name, sizeof(name), "%s.rom", object_get_typename(OBJECT(pdev))); } pdev->has_rom = true; - memory_region_init_ram(&pdev->rom, NULL, name, size); + memory_region_init_ram(&pdev->rom, OBJECT(pdev), name, size); vmstate_register_ram(&pdev->rom, &pdev->qdev); ptr = memory_region_get_ram_ptr(&pdev->rom); load_image(path, ptr); diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 28ae65e..ecdeab0 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -147,7 +147,7 @@ static void pci_bridge_init_alias(PCIBridge *bridge, MemoryRegion *alias, * Apparently no way to do this with existing memory APIs. */ pcibus_t size = enabled && limit >= base ? limit + 1 - base : 0; - memory_region_init_alias(alias, NULL, name, space, base, size); + memory_region_init_alias(alias, OBJECT(bridge), name, space, base, size); memory_region_add_subregion_overlap(parent_space, base, alias, 1); } @@ -156,13 +156,13 @@ static void pci_bridge_init_vga_aliases(PCIBridge *br, PCIBus *parent, { uint16_t brctl = pci_get_word(br->dev.config + PCI_BRIDGE_CONTROL); - memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_LO], NULL, + memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_LO], OBJECT(br), "pci_bridge_vga_io_lo", &br->address_space_io, QEMU_PCI_VGA_IO_LO_BASE, QEMU_PCI_VGA_IO_LO_SIZE); - memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_HI], NULL, + memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_IO_HI], OBJECT(br), "pci_bridge_vga_io_hi", &br->address_space_io, QEMU_PCI_VGA_IO_HI_BASE, QEMU_PCI_VGA_IO_HI_SIZE); - memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_MEM], NULL, + memory_region_init_alias(&alias_vga[QEMU_PCI_VGA_MEM], OBJECT(br), "pci_bridge_vga_mem", &br->address_space_mem, QEMU_PCI_VGA_MEM_BASE, QEMU_PCI_VGA_MEM_SIZE); @@ -367,9 +367,9 @@ int pci_bridge_initfn(PCIDevice *dev, const char *typename) sec_bus->parent_dev = dev; sec_bus->map_irq = br->map_irq ? br->map_irq : pci_swizzle_map_irq_fn; sec_bus->address_space_mem = &br->address_space_mem; - memory_region_init(&br->address_space_mem, NULL, "pci_bridge_pci", INT64_MAX); + memory_region_init(&br->address_space_mem, OBJECT(br), "pci_bridge_pci", INT64_MAX); sec_bus->address_space_io = &br->address_space_io; - memory_region_init(&br->address_space_io, NULL, "pci_bridge_io", 65536); + memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io", 65536); br->windows = pci_bridge_region_init(br); QLIST_INIT(&sec_bus->child); QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling); diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c index 26f2007..b70e5ad 100644 --- a/hw/pci/pcie_host.c +++ b/hw/pci/pcie_host.c @@ -130,7 +130,8 @@ void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr, assert(size >= PCIE_MMCFG_SIZE_MIN); assert(size <= PCIE_MMCFG_SIZE_MAX); e->size = size; - memory_region_init_io(&e->mmio, NULL, &pcie_mmcfg_ops, e, "pcie-mmcfg", e->size); + memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, + "pcie-mmcfg", e->size); e->base_addr = addr; memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio); } diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c index c4eae07..eb092fd 100644 --- a/hw/pci/shpc.c +++ b/hw/pci/shpc.c @@ -612,8 +612,8 @@ int shpc_init(PCIDevice *d, PCIBus *sec_bus, MemoryRegion *bar, unsigned offset) } /* TODO: init cmask */ - memory_region_init_io(&shpc->mmio, NULL, &shpc_mmio_ops, d, "shpc-mmio", - SHPC_SIZEOF(d)); + memory_region_init_io(&shpc->mmio, OBJECT(d), &shpc_mmio_ops, + d, "shpc-mmio", SHPC_SIZEOF(d)); shpc_cap_update_dword(d); memory_region_add_subregion(bar, offset, &shpc->mmio); pci_bus_hotplug(sec_bus, shpc_device_hotplug, &d->qdev); diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index b45fe91..a385b51 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -783,7 +783,7 @@ static int e500_ccsr_initfn(SysBusDevice *dev) PPCE500CCSRState *ccsr; ccsr = CCSR(dev); - memory_region_init(&ccsr->ccsr_space, NULL, "e500-ccsr", + memory_region_init(&ccsr->ccsr_space, OBJECT(ccsr), "e500-ccsr", MPC8544_CCSRBAR_SIZE); return 0; } diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c index 56249b4..2e2f2eb 100644 --- a/hw/ppc/mpc8544_guts.c +++ b/hw/ppc/mpc8544_guts.c @@ -119,7 +119,7 @@ static void mpc8544_guts_initfn(Object *obj) SysBusDevice *d = SYS_BUS_DEVICE(obj); GutsState *s = MPC8544_GUTS(obj); - memory_region_init_io(&s->iomem, NULL, &mpc8544_guts_ops, s, + memory_region_init_io(&s->iomem, OBJECT(s), &mpc8544_guts_ops, s, "mpc8544.guts", MPC8544_GUTS_MMIO_SIZE); sysbus_init_mmio(d, &s->iomem); } diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c index f227043..d2d6f65 100644 --- a/hw/ppc/ppc4xx_pci.c +++ b/hw/ppc/ppc4xx_pci.c @@ -355,12 +355,12 @@ static int ppc4xx_pcihost_initfn(SysBusDevice *dev) pci_create_simple(b, 0, "ppc4xx-host-bridge"); /* XXX split into 2 memory regions, one for config space, one for regs */ - memory_region_init(&s->container, NULL, "pci-container", PCI_ALL_SIZE); - memory_region_init_io(&h->conf_mem, NULL, &pci_host_conf_le_ops, h, + memory_region_init(&s->container, OBJECT(s), "pci-container", PCI_ALL_SIZE); + memory_region_init_io(&h->conf_mem, OBJECT(s), &pci_host_conf_le_ops, h, "pci-conf-idx", 4); - memory_region_init_io(&h->data_mem, NULL, &pci_host_data_le_ops, h, + memory_region_init_io(&h->data_mem, OBJECT(s), &pci_host_data_le_ops, h, "pci-conf-data", 4); - memory_region_init_io(&s->iomem, NULL, &pci_reg_ops, s, + memory_region_init_io(&s->iomem, OBJECT(s), &pci_reg_ops, s, "pci.reg", PCI_REG_SIZE); memory_region_add_subregion(&s->container, PCIC0_CFGADDR, &h->conf_mem); memory_region_add_subregion(&s->container, PCIC0_CFGDATA, &h->data_mem); diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c index 0817f14..11b7de2 100644 --- a/hw/ppc/ppce500_spin.c +++ b/hw/ppc/ppce500_spin.c @@ -191,8 +191,8 @@ static int ppce500_spin_initfn(SysBusDevice *dev) s = FROM_SYSBUS(SpinState, SYS_BUS_DEVICE(dev)); - memory_region_init_io(&s->iomem, NULL, &spin_rw_ops, s, "e500 spin pv device", - sizeof(SpinInfo) * MAX_CPUS); + memory_region_init_io(&s->iomem, OBJECT(s), &spin_rw_ops, s, + "e500 spin pv device", sizeof(SpinInfo) * MAX_CPUS); sysbus_init_mmio(dev, &s->iomem); qemu_register_reset(spin_reset, s); diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 7710aa0..232b0a8 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -581,10 +581,11 @@ static int spapr_phb_init(SysBusDevice *s) /* Initialize memory regions */ sprintf(namebuf, "%s.mmio", sphb->dtbusname); - memory_region_init(&sphb->memspace, NULL, namebuf, INT64_MAX); + memory_region_init(&sphb->memspace, OBJECT(sphb), namebuf, INT64_MAX); sprintf(namebuf, "%s.mmio-alias", sphb->dtbusname); - memory_region_init_alias(&sphb->memwindow, NULL, namebuf, &sphb->memspace, + memory_region_init_alias(&sphb->memwindow, OBJECT(sphb), + namebuf, &sphb->memspace, SPAPR_PCI_MEM_WIN_BUS_OFFSET, sphb->mem_win_size); memory_region_add_subregion(get_system_memory(), sphb->mem_win_addr, &sphb->memwindow); @@ -598,12 +599,13 @@ static int spapr_phb_init(SysBusDevice *s) * system_io works around the problem until all the users of * old_portion are updated */ sprintf(namebuf, "%s.io", sphb->dtbusname); - memory_region_init(&sphb->iospace, NULL, namebuf, SPAPR_PCI_IO_WIN_SIZE); + memory_region_init(&sphb->iospace, OBJECT(sphb), + namebuf, SPAPR_PCI_IO_WIN_SIZE); /* FIXME: fix to support multiple PHBs */ memory_region_add_subregion(get_system_io(), 0, &sphb->iospace); sprintf(namebuf, "%s.io-alias", sphb->dtbusname); - memory_region_init_io(&sphb->iowindow, NULL, &spapr_io_ops, sphb, + memory_region_init_io(&sphb->iowindow, OBJECT(sphb), &spapr_io_ops, sphb, namebuf, SPAPR_PCI_IO_WIN_SIZE); memory_region_add_subregion(get_system_memory(), sphb->io_win_addr, &sphb->iowindow); @@ -613,7 +615,7 @@ static int spapr_phb_init(SysBusDevice *s) * from msi_notify()/msix_notify() */ if (msi_supported) { sprintf(namebuf, "%s.msi", sphb->dtbusname); - memory_region_init_io(&sphb->msiwindow, NULL, &spapr_msi_ops, sphb, + memory_region_init_io(&sphb->msiwindow, OBJECT(sphb), &spapr_msi_ops, sphb, namebuf, SPAPR_MSIX_MAX_DEVS * 0x10000); memory_region_add_subregion(get_system_memory(), sphb->msi_win_addr, &sphb->msiwindow);