From patchwork Sun Jun 2 15:17:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 248114 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 32B592C00A7 for ; Mon, 3 Jun 2013 01:18:21 +1000 (EST) Received: from localhost ([::1]:48091 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UjA30-0001om-IU for incoming@patchwork.ozlabs.org; Sun, 02 Jun 2013 11:18:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38030) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UjA2k-0001oW-JR for qemu-devel@nongnu.org; Sun, 02 Jun 2013 11:18:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UjA2g-00005o-Sl for qemu-devel@nongnu.org; Sun, 02 Jun 2013 11:18:02 -0400 Received: from 1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa ([2001:8b0:1d0::1]:57724 helo=mnementh.archaic.org.uk) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UjA2g-00005g-MR; Sun, 02 Jun 2013 11:17:58 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1UjA2X-0006LE-GE; Sun, 02 Jun 2013 16:17:49 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Sun, 2 Jun 2013 16:17:49 +0100 Message-Id: <1370186269-24353-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: qemu-trivial@nongnu.org, Paolo Bonzini , Anthony Liguori , patches@linaro.org Subject: [Qemu-devel] [PATCH] softfloat: Fix shift128Right for shift counts 64..127 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org shift128Right would give the wrong result for a shift count between 64 and 127. This was never noticed because all of our uses of this function are guaranteed not to use shift counts in this range. Signed-off-by: Peter Maydell Reviewed-by: Paolo Bonzini --- Found by code inspection. This contribution can be licensed under either the softfloat-2a or -2b license. fpu/softfloat-macros.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index b5164af..9b09545 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -168,7 +168,7 @@ INLINE void z0 = a0>>count; } else { - z1 = ( count < 64 ) ? ( a0>>( count & 63 ) ) : 0; + z1 = (count < 128) ? (a0 >> (count & 63)) : 0; z0 = 0; } *z1Ptr = z1;