diff mbox

powerpc: correctly handle fpu exceptions.

Message ID 1365519655-30416-1-git-send-email-chouteau@adacore.com
State New
Headers show

Commit Message

Fabien Chouteau April 9, 2013, 3 p.m. UTC
From: Tristan Gingold <gingold@adacore.com>

Raise the exception on the first occurence, do not wait for the next
floating point operation.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
---
 target-ppc/fpu_helper.c |   23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

Comments

Alexander Graf April 10, 2013, 10:09 p.m. UTC | #1
On 09.04.2013, at 17:00, Fabien Chouteau wrote:

> From: Tristan Gingold <gingold@adacore.com>
> 
> Raise the exception on the first occurence, do not wait for the next
> floating point operation.

Do you have a test case for this one that I could use to compare results with real hardware?

Alex

> 
> Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
> ---
> target-ppc/fpu_helper.c |   23 ++++++++++++-----------
> 1 file changed, 12 insertions(+), 11 deletions(-)
> 
> diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
> index 9e779ea..1e141fb 100644
> --- a/target-ppc/fpu_helper.c
> +++ b/target-ppc/fpu_helper.c
> @@ -470,6 +470,18 @@ void store_fpscr(CPUPPCState *env, uint64_t arg, uint32_t mask)
> 
> void helper_float_check_status(CPUPPCState *env)
> {
> +    int status = get_float_exception_flags(&env->fp_status);
> +
> +    if (status & float_flag_divbyzero) {
> +        float_zero_divide_excp(env);
> +    } else if (status & float_flag_overflow) {
> +        float_overflow_excp(env);
> +    } else if (status & float_flag_underflow) {
> +        float_underflow_excp(env);
> +    } else if (status & float_flag_inexact) {
> +        float_inexact_excp(env);
> +    }
> +
>     if (env->exception_index == POWERPC_EXCP_PROGRAM &&
>         (env->error_code & POWERPC_EXCP_FP)) {
>         /* Differred floating-point exception after target FPR update */
> @@ -477,17 +489,6 @@ void helper_float_check_status(CPUPPCState *env)
>             helper_raise_exception_err(env, env->exception_index,
>                                        env->error_code);
>         }
> -    } else {
> -        int status = get_float_exception_flags(&env->fp_status);
> -        if (status & float_flag_divbyzero) {
> -            float_zero_divide_excp(env);
> -        } else if (status & float_flag_overflow) {
> -            float_overflow_excp(env);
> -        } else if (status & float_flag_underflow) {
> -            float_underflow_excp(env);
> -        } else if (status & float_flag_inexact) {
> -            float_inexact_excp(env);
> -        }
>     }
> }
> 
> -- 
> 1.7.9.5
>
Fabien Chouteau April 11, 2013, 8:29 a.m. UTC | #2
On 04/11/2013 12:09 AM, Alexander Graf wrote:
> 
> On 09.04.2013, at 17:00, Fabien Chouteau wrote:
> 
>> From: Tristan Gingold <gingold@adacore.com>
>>
>> Raise the exception on the first occurence, do not wait for the next
>> floating point operation.
> 
> Do you have a test case for this one that I could use to compare results with real hardware?
> 

Not for real hardware, maybe you can try to build a simple program with
just do a division by zero.
Alexander Graf April 19, 2013, 3:29 p.m. UTC | #3
On 09.04.2013, at 17:00, Fabien Chouteau wrote:

> From: Tristan Gingold <gingold@adacore.com>
> 
> Raise the exception on the first occurence, do not wait for the next
> floating point operation.
> 
> Signed-off-by: Fabien Chouteau <chouteau@adacore.com>

Thanks, applied to ppc-next.

Alex

> ---
> target-ppc/fpu_helper.c |   23 ++++++++++++-----------
> 1 file changed, 12 insertions(+), 11 deletions(-)
> 
> diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
> index 9e779ea..1e141fb 100644
> --- a/target-ppc/fpu_helper.c
> +++ b/target-ppc/fpu_helper.c
> @@ -470,6 +470,18 @@ void store_fpscr(CPUPPCState *env, uint64_t arg, uint32_t mask)
> 
> void helper_float_check_status(CPUPPCState *env)
> {
> +    int status = get_float_exception_flags(&env->fp_status);
> +
> +    if (status & float_flag_divbyzero) {
> +        float_zero_divide_excp(env);
> +    } else if (status & float_flag_overflow) {
> +        float_overflow_excp(env);
> +    } else if (status & float_flag_underflow) {
> +        float_underflow_excp(env);
> +    } else if (status & float_flag_inexact) {
> +        float_inexact_excp(env);
> +    }
> +
>     if (env->exception_index == POWERPC_EXCP_PROGRAM &&
>         (env->error_code & POWERPC_EXCP_FP)) {
>         /* Differred floating-point exception after target FPR update */
> @@ -477,17 +489,6 @@ void helper_float_check_status(CPUPPCState *env)
>             helper_raise_exception_err(env, env->exception_index,
>                                        env->error_code);
>         }
> -    } else {
> -        int status = get_float_exception_flags(&env->fp_status);
> -        if (status & float_flag_divbyzero) {
> -            float_zero_divide_excp(env);
> -        } else if (status & float_flag_overflow) {
> -            float_overflow_excp(env);
> -        } else if (status & float_flag_underflow) {
> -            float_underflow_excp(env);
> -        } else if (status & float_flag_inexact) {
> -            float_inexact_excp(env);
> -        }
>     }
> }
> 
> -- 
> 1.7.9.5
>
diff mbox

Patch

diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 9e779ea..1e141fb 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -470,6 +470,18 @@  void store_fpscr(CPUPPCState *env, uint64_t arg, uint32_t mask)
 
 void helper_float_check_status(CPUPPCState *env)
 {
+    int status = get_float_exception_flags(&env->fp_status);
+
+    if (status & float_flag_divbyzero) {
+        float_zero_divide_excp(env);
+    } else if (status & float_flag_overflow) {
+        float_overflow_excp(env);
+    } else if (status & float_flag_underflow) {
+        float_underflow_excp(env);
+    } else if (status & float_flag_inexact) {
+        float_inexact_excp(env);
+    }
+
     if (env->exception_index == POWERPC_EXCP_PROGRAM &&
         (env->error_code & POWERPC_EXCP_FP)) {
         /* Differred floating-point exception after target FPR update */
@@ -477,17 +489,6 @@  void helper_float_check_status(CPUPPCState *env)
             helper_raise_exception_err(env, env->exception_index,
                                        env->error_code);
         }
-    } else {
-        int status = get_float_exception_flags(&env->fp_status);
-        if (status & float_flag_divbyzero) {
-            float_zero_divide_excp(env);
-        } else if (status & float_flag_overflow) {
-            float_overflow_excp(env);
-        } else if (status & float_flag_underflow) {
-            float_underflow_excp(env);
-        } else if (status & float_flag_inexact) {
-            float_inexact_excp(env);
-        }
     }
 }